[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block: [WIP]Add Intel common SPI code

[Barnali Sarkar (Code Review)]

Hello Aaron Durbin, Subrata Banik, Balaji Manigandan, Paul Menzel, Hannah Williams, build bot (Jenkins),

I'd like you to reexamine a change.  Please visit

    https://review.coreboot.org/18557

to look at the new patch set (#7).

Change subject: soc/intel/common/block: [WIP]Add Intel common SPI code
......................................................................

soc/intel/common/block: [WIP]Add Intel common SPI code

Create Intel Common SPI driver code.
This driver currently only contains the code for SPI initialization
required in Bootblock phase, which has the following programming -
* Enable SPIBAR
* Disable the BIOS write protect so write commands are allowed
* Enable SPI Prefetching and Caching.
More code will get added up in the subsequent phases.

Change-Id: I046e3b30c8efb172851dd17f49565c9ec4cb38cb
Signed-off-by: Barnali Sarkar <barnali.sarkar at intel.com>
---
A src/soc/intel/common/block/fast_spi/Kconfig
A src/soc/intel/common/block/fast_spi/Makefile.inc
A src/soc/intel/common/block/fast_spi/spi.c
A src/soc/intel/common/block/include/intelblocks/spi.h
4 files changed, 100 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/18557/7
-- 
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I046e3b30c8efb172851dd17f49565c9ec4cb38cb
Gerrit-PatchSet: 7
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins)