[coreboot-gerrit] Change in coreboot[master]: mainboard/google/poppy: Use sideband IRQ for SD Card Detect

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded a new change for review. ( https://review.coreboot.org/18926 )

Change subject: mainboard/google/poppy: Use sideband IRQ for SD Card Detect
......................................................................

mainboard/google/poppy: Use sideband IRQ for SD Card Detect

Since SD card controller is expected to enter D3hot by runtime power
management if there is no card inserted, we need to use a sideband IRQ
pin which is not under the control of the controller. Thus, configure
GPP_A7 as the sideband IRQ pin and pass it to OS as the card detect
pin.

BUG=b:35586693
BRANCH=None
TEST=Verified on a reworked poppy board that card detect works fine.

Change-Id: I4512f5d7829583e27c9750463396eaffbc5702b4
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
M src/mainboard/google/poppy/devicetree.cb
M src/mainboard/google/poppy/gpio.h
2 files changed, 2 insertions(+), 2 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/18926/1

diff --git a/src/mainboard/google/poppy/devicetree.cb b/src/mainboard/google/poppy/devicetree.cb
index fc63967..7bf28d0 100644
--- a/src/mainboard/google/poppy/devicetree.cb
+++ b/src/mainboard/google/poppy/devicetree.cb
@@ -177,7 +177,7 @@
 	register "tcc_offset" = "10"     # TCC of 90C
 
 	# Use default SD card detect GPIO configuration
-	register "sdcard_cd_gpio_default" = "GPP_G7"
+	register "sdcard_cd_gpio_default" = "GPP_A7"
 
 	device cpu_cluster 0 on
 		device lapic 0 on end
diff --git a/src/mainboard/google/poppy/gpio.h b/src/mainboard/google/poppy/gpio.h
index bd452af..5fa8244 100644
--- a/src/mainboard/google/poppy/gpio.h
+++ b/src/mainboard/google/poppy/gpio.h
@@ -48,7 +48,7 @@
 /* ESPI_IO3 */
 /* ESPI_CS# */
 /* SERIRQ */		PAD_CFG_NC(GPP_A6), /* TP44 */
-/* PIRQA# */		PAD_CFG_NC(GPP_A7),
+/* PIRQA# */		PAD_CFG_GPI(GPP_A7, 20K_PU, DEEP), /* SD_CD# */
 /* CLKRUN# */		PAD_CFG_NC(GPP_A8), /* TP45 */
 /* ESPI_CLK */
 /* CLKOUT_LPC1 */	PAD_CFG_NC(GPP_A10),

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I4512f5d7829583e27c9750463396eaffbc5702b4
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Furquan Shaikh <furquan at google.com>