[coreboot-gerrit] Change in coreboot[master]: nb/intel/x4x: Add raminit debugging macros

Arthur Heymans (Code Review) gerrit at coreboot.org
Mon Mar 20 16:42:25 CET 2017


Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/18924 )

Change subject: nb/intel/x4x: Add raminit debugging macros
......................................................................

nb/intel/x4x: Add raminit debugging macros

Makes it possible to use CONFIG_DEBUG_RAM_SETUP to reduce raminit
verbosity.

Hides JEDEC steps using the macro.

Also hides a hexdump of SPDs.

The main reason for this change is for it to be used in a refactor of
the DQS receive enable calibration which is much more verbose.

Change-Id: Ie2b484cf1f1d296823df0473e852d9d07ca20246
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/northbridge/intel/x4x/raminit.c
M src/northbridge/intel/x4x/raminit_ddr2.c
M src/northbridge/intel/x4x/x4x.h
3 files changed, 10 insertions(+), 2 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/18924/1

diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 86f63f1..435112d 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -56,7 +56,8 @@
 				s->dimms[i].card_type = ((u8) status) & 0x1f;
 		}
 		if (status >= 0) {
-			hexdump(s->dimms[i].spd_data, 64);
+			if (IS_ENABLED(CONFIG_DEBUG_RAM_SETUP))
+				hexdump(s->dimms[i].spd_data, 64);
 		}
 	}
 
diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c
index 9c414e2..364b62d 100644
--- a/src/northbridge/intel/x4x/raminit_ddr2.c
+++ b/src/northbridge/intel/x4x/raminit_ddr2.c
@@ -1227,7 +1227,7 @@
 			}
 			dojedec_ddr2(r + ch*4, ch, jedec[i][0], v);
 			udelay(1);
-			//printk(BIOS_DEBUG, "Jedec step %d\n", i);
+			PRINTK_DEBUG("Jedec step %d\n", i);
 		}
 	}
 	printk(BIOS_DEBUG, "MRS done\n");
diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h
index faae775..a585ddf 100644
--- a/src/northbridge/intel/x4x/x4x.h
+++ b/src/northbridge/intel/x4x/x4x.h
@@ -329,6 +329,13 @@
 void sdram_initialize(int boot_path, const u8 *spd_map);
 void raminit_ddr2(struct sysinfo *);
 
+/* Debugging macros. */
+#if CONFIG_DEBUG_RAM_SETUP
+#define PRINTK_DEBUG(x...)	printk(BIOS_DEBUG, x)
+#else
+#define PRINTK_DEBUG(x...)
+#endif
+
 struct acpi_rsdp;
 #ifndef __SIMPLE_DEVICE__
 unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start, struct acpi_rsdp *rsdp);

-- 
To view, visit https://review.coreboot.org/18924
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Gerrit-MessageType: newchange
Gerrit-Change-Id: Ie2b484cf1f1d296823df0473e852d9d07ca20246
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>



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