[coreboot-gerrit] Change in coreboot[master]: mainboard/asus/kgpe-d16: Add PCI/PCIe reset support

[Timothy Pearson (Code Review)]

Timothy Pearson has uploaded a new change for review. ( https://review.coreboot.org/18918 )

Change subject: mainboard/asus/kgpe-d16: Add PCI/PCIe reset support
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mainboard/asus/kgpe-d16: Add PCI/PCIe reset support

Logic exists on the KGPE-D16 system board to reset PCIe devices.
Make sure that all PCIe devices are correctly reset during startup.

Signed-off-by: Timothy Pearson <tpearson at raptorengineering.com>
Change-Id: Idf2563004f5cd62fb648051228f2dae6c958cec2
---
M src/mainboard/asus/kgpe-d16/mainboard.c
1 file changed, 24 insertions(+), 9 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/18918/1

diff --git a/src/mainboard/asus/kgpe-d16/mainboard.c b/src/mainboard/asus/kgpe-d16/mainboard.c
index 65029d4..da2d227 100644
--- a/src/mainboard/asus/kgpe-d16/mainboard.c
+++ b/src/mainboard/asus/kgpe-d16/mainboard.c
@@ -20,30 +20,45 @@
 #include <arch/io.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
+#include <device/pnp.h>
 #include <device/pci_def.h>
+#include <superio/conf_mode.h>
+#include <superio/nuvoton/nct5572d/nct5572d.h>
 #include <southbridge/amd/sb700/sb700.h>
 #include <southbridge/amd/sr5650/cmn.h>
-
 
 void set_pcie_reset(void);
 void set_pcie_dereset(void);
 
 void set_pcie_reset(void)
 {
-	device_t pcie_core_dev;
+	device_t dev = dev_find_slot_pnp(0x2e, NCT5572D_ACPI);
+	uint8_t byte;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
-	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x28282828);
-	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x00000028);
+	printk(BIOS_SPEW, "%s\n", __func__);
+
+	pnp_enter_conf_mode_8787(dev);
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 1);					/* Enable ACPI */
+	byte = pnp_read_config(dev, 0xf2);			/* Read RSTOUT# status */
+	pnp_write_config(dev, 0xf2, byte & ~(0x1 << 4));	/* Assert RSTOUT2# */
+	pnp_exit_conf_mode(dev);
+
 }
 
 void set_pcie_dereset(void)
 {
-	device_t pcie_core_dev;
+	device_t dev = dev_find_slot_pnp(0x2e, NCT5572D_ACPI);
+	uint8_t byte;
 
-	pcie_core_dev = dev_find_slot(0, PCI_DEVFN(0, 0));
-	set_htiu_enable_bits(pcie_core_dev, 0xA8, 0xFFFFFFFF, 0x6F6F6F6F);
-	set_htiu_enable_bits(pcie_core_dev, 0xA9, 0x000000FF, 0x0000006F);
+	printk(BIOS_SPEW, "%s\n", __func__);
+
+	pnp_enter_conf_mode_8787(dev);
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 1);					/* Enable ACPI */
+	byte = pnp_read_config(dev, 0xf2);			/* Read RSTOUT# status */
+	pnp_write_config(dev, 0xf2, byte | (0x1 << 4));		/* Deassert RSTOUT2# */
+	pnp_exit_conf_mode(dev);
 }
 
 /*************************************************

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: Idf2563004f5cd62fb648051228f2dae6c958cec2
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Timothy Pearson <tpearson at raptorengineering.com>