[coreboot-gerrit] Change in coreboot[master]: Remove AGESA Fam10 support
Adurb Akhbar (Code Review)
gerrit at coreboot.org
Sun Mar 19 20:47:09 CET 2017
Adurb Akhbar has uploaded a new change for review. ( https://review.coreboot.org/18908 )
Change subject: Remove AGESA Fam10 support
......................................................................
Remove AGESA Fam10 support
Native Fam10 support predates the AGESA implementation by about five
years, hence why the AGESA port for Fam10 never really took off. It
was a (arguably failed) experiment to test how the AGESA codebase
would interact. The lack of any significant contributions on this
front shows a lack of interest, and preference to the native code
paths instead.
Change-Id: Icd7c7bfa13a311d3e9725bf681ab7c400f68aa2c
Signed-off-by: Adurb Akhbar <aakhbar at mail.com>
---
M src/cpu/amd/agesa/Kconfig
M src/cpu/amd/agesa/Makefile.inc
D src/cpu/amd/agesa/family10/Kconfig
D src/cpu/amd/agesa/family10/Makefile.inc
D src/cpu/amd/agesa/family10/chip_name.c
D src/cpu/amd/agesa/family10/model_10_init.c
M src/mainboard/amd/dinar/rd890_cfg.h
M src/mainboard/supermicro/h8qgi/buildOpts.c
M src/mainboard/supermicro/h8qgi/rd890_cfg.h
M src/mainboard/supermicro/h8qgi/romstage.c
M src/mainboard/supermicro/h8scm/rd890_cfg.h
M src/mainboard/supermicro/h8scm/romstage.c
M src/mainboard/tyan/s8226/buildOpts.c
M src/mainboard/tyan/s8226/rd890_cfg.h
M src/mainboard/tyan/s8226/romstage.c
M src/northbridge/amd/agesa/Makefile.inc
D src/northbridge/amd/agesa/family10/Kconfig
D src/northbridge/amd/agesa/family10/Makefile.inc
D src/northbridge/amd/agesa/family10/amdfam10.h
D src/northbridge/amd/agesa/family10/northbridge.c
D src/northbridge/amd/agesa/family10/reset_test.h
M src/southbridge/amd/sr5650/early_setup.c
M src/vendorcode/amd/agesa/Makefile.inc
D src/vendorcode/amd/agesa/f10/AGESA.h
D src/vendorcode/amd/agesa/f10/AMD.h
D src/vendorcode/amd/agesa/f10/Dispatcher.h
D src/vendorcode/amd/agesa/f10/Include/AdvancedApi.h
D src/vendorcode/amd/agesa/f10/Include/CommonReturns.h
D src/vendorcode/amd/agesa/f10/Include/Filecode.h
D src/vendorcode/amd/agesa/f10/Include/GeneralServices.h
D src/vendorcode/amd/agesa/f10/Include/GnbInterface.h
D src/vendorcode/amd/agesa/f10/Include/GnbInterfaceStub.h
D src/vendorcode/amd/agesa/f10/Include/Ids.h
D src/vendorcode/amd/agesa/f10/Include/IdsHt.h
D src/vendorcode/amd/agesa/f10/Include/OptionC6Install.h
D src/vendorcode/amd/agesa/f10/Include/OptionCpuCacheFlushOnHaltInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionCpuCoreLevelingInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionCpuFeaturesInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionDanubeMicrocodeInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionDmi.h
D src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionDragonMicrocodeInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionFamily10h.h
D src/vendorcode/amd/agesa/f10/Include/OptionFamily10hBlInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionFamily10hDaInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionFamily10hHyInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionFamily10hInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionFamily10hRbInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionHtInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionHwC1eInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionIdsInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionLynxMicrocodeInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionMaranelloMicrocodeInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionMemory.h
D src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionMemoryRecovery.h
D src/vendorcode/amd/agesa/f10/Include/OptionMemoryRecoveryInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionMsgBasedC1eInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionMultiSocket.h
D src/vendorcode/amd/agesa/f10/Include/OptionMultiSocketInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionNileMicrocodeInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionPreserveMailboxInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionPstate.h
D src/vendorcode/amd/agesa/f10/Include/OptionPstateInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionS3ScriptInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionSanMarinoMicrocodeInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionSlit.h
D src/vendorcode/amd/agesa/f10/Include/OptionSlitInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionSrat.h
D src/vendorcode/amd/agesa/f10/Include/OptionSratInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionTigrisMicrocodeInstall.h
D src/vendorcode/amd/agesa/f10/Include/OptionWhea.h
D src/vendorcode/amd/agesa/f10/Include/OptionWheaInstall.h
D src/vendorcode/amd/agesa/f10/Include/Options.h
D src/vendorcode/amd/agesa/f10/Include/OptionsHt.h
D src/vendorcode/amd/agesa/f10/Include/OptionsPage.h
D src/vendorcode/amd/agesa/f10/Include/PlatformInstall.h
D src/vendorcode/amd/agesa/f10/Include/PlatformMemoryConfiguration.h
D src/vendorcode/amd/agesa/f10/Include/Topology.h
D src/vendorcode/amd/agesa/f10/Include/gcc-intrin.h
D src/vendorcode/amd/agesa/f10/Legacy/Proc/Dispatcher.c
D src/vendorcode/amd/agesa/f10/Legacy/Proc/agesaCallouts.c
D src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c
D src/vendorcode/amd/agesa/f10/MainPage.h
D src/vendorcode/amd/agesa/f10/Makefile.inc
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10MultiLinkPciTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PackageType.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbCofVidInit.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbCofVidInit.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbPstateInit.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbPstateInit.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10SingleLinkPciTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlCacheFlushOnHalt.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlEquivalenceTable.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlHtPhyTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlLogicalIdTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMsrTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlPciTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaCacheFlushOnHalt.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaEquivalenceTable.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaHtPhyTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaLogicalIdTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMsrTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaPciTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCHtPhyTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCMsrTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCPciTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCUtilities.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDMsgBasedC1e.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDUtilities.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyEquivalenceTable.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyHtPhyTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyInitEarlyTable.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyLogicalIdTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMsrTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyPciTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuCommonF10Utilities.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuCommonF10Utilities.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandId.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdAm3.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdAsb2.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdC32.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdFr1207.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdG34.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdS1g3.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdS1g4.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10CacheDefaults.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10CacheFlushOnHalt.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Dmi.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10EarlyInit.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10EarlyInit.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10HtPhyTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10MsrTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PciTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerCheck.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerCheck.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerMgmt.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerMgmtSystemTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerPlane.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerPlane.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Pstate.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Utilities.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Utilities.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Family/cpuFamRegisters.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/PreserveMailbox.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/PreserveMailbox.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuC6State.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuC6State.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheFlushOnHalt.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheInit.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheInit.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCoreLeveling.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuDmi.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatureLeveling.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatures.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatures.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHtAssist.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHtAssist.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHwC1e.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHwC1e.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuMsgBasedC1e.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuMsgBasedC1e.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateGather.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateLeveling.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateTables.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateTables.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuSlit.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuSrat.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuWhea.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/S3.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/S3.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/Table.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/Table.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuApicUtilities.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuApicUtilities.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuBist.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuBrandId.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEarlyInit.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEarlyInit.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEnvInit.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEventLog.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuFamilyTranslation.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuFamilyTranslation.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuGeneralServices.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuInitEarlyTable.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuLateInit.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuLateInit.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuMicrocodePatch.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPage.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPostInit.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPostInit.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmt.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtMultiSocket.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtMultiSocket.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSingleSocket.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSingleSocket.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSystemTables.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuRegisters.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuServices.h
D src/vendorcode/amd/agesa/f10/Proc/CPU/cpuWarmReset.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/heapManager.c
D src/vendorcode/amd/agesa/f10/Proc/CPU/heapManager.h
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitEarly.c
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitEnv.c
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitLate.c
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitMid.c
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitPost.c
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitRecovery.c
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitReset.c
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitResume.c
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdLateRunApTask.c
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdS3LateRestore.c
D src/vendorcode/amd/agesa/f10/Proc/Common/AmdS3Save.c
D src/vendorcode/amd/agesa/f10/Proc/Common/CommonInits.c
D src/vendorcode/amd/agesa/f10/Proc/Common/CommonInits.h
D src/vendorcode/amd/agesa/f10/Proc/Common/CommonPage.h
D src/vendorcode/amd/agesa/f10/Proc/Common/CommonReturns.c
D src/vendorcode/amd/agesa/f10/Proc/Common/CreateStruct.c
D src/vendorcode/amd/agesa/f10/Proc/Common/CreateStruct.h
D src/vendorcode/amd/agesa/f10/Proc/Common/S3RestoreState.c
D src/vendorcode/amd/agesa/f10/Proc/Common/S3SaveState.c
D src/vendorcode/amd/agesa/f10/Proc/Common/S3SaveState.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbCoherentFam10.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbCoherentFam10.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbFam10.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbNonCoherentFam10.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbNonCoherentFam10.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbOptimizationFam10.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbOptimizationFam10.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbSystemFam10.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbSystemFam10.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbUtilitiesFam10.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbUtilitiesFam10.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatDynamicDiscovery.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatDynamicDiscovery.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatGanging.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatGanging.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatNoncoherent.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatNoncoherent.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatOptimization.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatOptimization.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatRouting.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatRouting.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSets.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSublinks.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSublinks.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatTrafficDistribution.c
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatTrafficDistribution.h
D src/vendorcode/amd/agesa/f10/Proc/HT/Features/htIds.c
D src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbCoherent.c
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D src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmLvDdr3.c
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D src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmMemRestore.c
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D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrn.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrndct.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrnmct.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrntrain3.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrt3.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttpos.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttsrc.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrdef.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrinit.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrm.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrport.h
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrt3.h
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.h
D src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mruc.c
D src/vendorcode/amd/agesa/f10/Proc/Recovery/recoveryPage.h
D src/vendorcode/amd/agesa/f10/errno.h
D src/vendorcode/amd/agesa/f10/gcccar.inc
568 files changed, 0 insertions(+), 160,824 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/18908/1
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Gerrit-MessageType: newchange
Gerrit-Change-Id: Icd7c7bfa13a311d3e9725bf681ab7c400f68aa2c
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Adurb Akhbar
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