[coreboot-gerrit] Change in coreboot[master]: mainboard/neoware/g170: Initialize the IRQ routing

[Lubomir Rintel (Code Review)]

Lubomir Rintel has uploaded a new change for review. ( https://review.coreboot.org/18900 )

Change subject: mainboard/neoware/g170: Initialize the IRQ routing
......................................................................

mainboard/neoware/g170: Initialize the IRQ routing

Initialize IRQ routing for legacy non-PNP OSes the same as the factory
firmware would do.

Change-Id: I0c7a7d584a2c47471456ab54ef6da815a2dc4e7c
Signed-off-by: Lubomir Rintel <lkundrak at v3.sk>
---
A src/mainboard/neoware/g170/mainboard.c
1 file changed, 55 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/18900/1

diff --git a/src/mainboard/neoware/g170/mainboard.c b/src/mainboard/neoware/g170/mainboard.c
new file mode 100644
index 0000000..e292786
--- /dev/null
+++ b/src/mainboard/neoware/g170/mainboard.c
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Lubomir Rintel <lkundrak at v3.sk>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <arch/acpi.h>
+
+static void mainboard_final(void *chip_info)
+{
+	                                       /*  A  B   C  D */
+	static const unsigned char irq_map[4] = { 11, 5, 10, 0 };
+	device_t lpc_dev;
+
+	printk(BIOS_INFO, "Setting up G170 IRQ routing...\n");
+
+	lpc_dev = dev_find_device(PCI_VENDOR_ID_VIA,
+	                          PCI_DEVICE_ID_VIA_VT8237R_LPC, 0);
+
+	/* Disable APIC */
+	pci_write_config8(lpc_dev, 0x58, pci_read_config8(lpc_dev, 0x58) & ~0x40);
+
+	/* Share INTE-INTH with INTA-INTD */
+	pci_write_config8(lpc_dev, 0x46, 0x00);
+
+	/* Route INTA-INTD */
+	pci_write_config8(lpc_dev, 0x55, irq_map[0] << 4);
+	pci_write_config8(lpc_dev, 0x56, irq_map[1] << 4 | irq_map[2]);
+	pci_write_config8(lpc_dev, 0x57, irq_map[3]);
+
+	/* Assign IRQ numbers to known devices for non-PnP OSes */
+	pci_assign_irqs(0x00, 0x10, irq_map);
+	pci_assign_irqs(0x00, 0x11, irq_map);
+	pci_assign_irqs(0x00, 0x12, irq_map);
+	pci_assign_irqs(0x01, 0x00, irq_map);
+}
+
+struct chip_operations mainboard_ops = {
+	CHIP_NAME("HP Neoware G170")
+	.final = mainboard_final,
+};

-- 
To view, visit https://review.coreboot.org/18900
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I0c7a7d584a2c47471456ab54ef6da815a2dc4e7c
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Lubomir Rintel <lkundrak at v3.sk>