[coreboot-gerrit] Change in coreboot[master]: intelblocks/pci_dev: Create header for pci devices

gerrit code review gerrit at coreboot.org
Thu Mar 16 16:27:55 CET 2017


>From Subrata Banik <subrata.banik at intel.com>:

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/18576 )

Change subject: intelblocks/pci_dev: Create header for pci devices
......................................................................


Patch Set 10:

(1 comment)

https://review.coreboot.org/#/c/18576/10/src/soc/intel/common/block/include/intelblocks/pci_devs.h
File src/soc/intel/common/block/include/intelblocks/pci_devs.h:

Line 22: #define _SA_DEVFN(slot)		PCI_DEVFN(SA_DEV_SLOT_ ## slot, 0)
> Sure but like the systemagent.h introduction you'll have another header. Wh
i guess, i'm just following your earlier comments, review all IP code and try to see if anything can be common keep inside intelblocks/ and rest should be referred from soc/. Driven by that idea only i thought its a good design that we move all common code into 1, no the question is that, if its 1 or 2 register, i mayn't interested, bt after reviewing the EDS, i do see there are lots of common registers between big and small core, it may not today, bt for some future soc, we may need to use few of them, hence what is the point keep common code inside soc/ and not leveraging common/ header.

For adding PCH_SLOT, i guess i have added it once during patch set 1, and that time, we didn't have any PCH code touch hence, i thought to bring the right piece of code added in sequence hence it may create a story.


-- 
To view, visit https://review.coreboot.org/18576
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-MessageType: comment
Gerrit-Change-Id: I5e4c7502e9678c0a367e9c7a96cf848d5b24f68e
Gerrit-PatchSet: 10
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma at intel.com>
Gerrit-HasComments: Yes



More information about the coreboot-gerrit mailing list