[coreboot-gerrit] New patch to review for coreboot: siemens/mc_apl1: Make a general cleaning up.
Mario Scheithauer (mario.scheithauer@siemens.com)
gerrit at coreboot.org
Tue Mar 14 14:32:33 CET 2017
Mario Scheithauer (mario.scheithauer at siemens.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18808
-gerrit
commit 615c928f42e36f22f5470a788c6049c8f38e1158
Author: Mario Scheithauer <mario.scheithauer at siemens.com>
Date: Tue Mar 14 14:27:29 2017 +0100
siemens/mc_apl1: Make a general cleaning up.
This patch makes some general adaptions in relation to the
intel/leafhill clean up patch.
Add necessary defaults to Kconfig.
Remove irrelevant entries from FMD file.
Include romstage file for better understanding.
Change-Id: I190d648a7ffeca11acc6560db85ff03c78e85b21
Signed-off-by: Mario Scheithauer <mario.scheithauer at siemens.com>
---
src/mainboard/siemens/mc_apl1/Kconfig | 4 +++
src/mainboard/siemens/mc_apl1/Makefile.inc | 5 ++++
src/mainboard/siemens/mc_apl1/mc_apl1.fmd | 44 ++++++------------------------
3 files changed, 18 insertions(+), 35 deletions(-)
diff --git a/src/mainboard/siemens/mc_apl1/Kconfig b/src/mainboard/siemens/mc_apl1/Kconfig
index ef9d021..83500f2 100644
--- a/src/mainboard/siemens/mc_apl1/Kconfig
+++ b/src/mainboard/siemens/mc_apl1/Kconfig
@@ -16,4 +16,8 @@ config MAINBOARD_PART_NUMBER
string
default "MC APL1"
+config MAX_CPUS
+ int
+ default 4
+
endif # BOARD_SIEMENS_MC_APL1
diff --git a/src/mainboard/siemens/mc_apl1/Makefile.inc b/src/mainboard/siemens/mc_apl1/Makefile.inc
index 9e3e892..f5fd1e5 100644
--- a/src/mainboard/siemens/mc_apl1/Makefile.inc
+++ b/src/mainboard/siemens/mc_apl1/Makefile.inc
@@ -1,3 +1,8 @@
bootblock-y += bootblock.c
+# The inclusion of romstage.c is not necessary here.
+# It is put down only to the better understanding.
+# The File is allready included over src/arch/x86/Makefile.inc.
+romstage-y += romstage.c
+
ramstage-y += mainboard.c
diff --git a/src/mainboard/siemens/mc_apl1/mc_apl1.fmd b/src/mainboard/siemens/mc_apl1/mc_apl1.fmd
index 432e8de..8c6dda8 100644
--- a/src/mainboard/siemens/mc_apl1/mc_apl1.fmd
+++ b/src/mainboard/siemens/mc_apl1/mc_apl1.fmd
@@ -1,40 +1,14 @@
FLASH 16M {
- WP_RO at 0x0 0xe00000 {
- SI_DESC at 0x0 0x1000
- IFWI at 0x1000 0x23f000
- RO_VPD at 0x240000 0x4000
- RO_SECTION at 0x244000 0xbbc000 {
- FMAP at 0x0 0x800
- RO_UNUSED_1 at 0x800 0x800
- COREBOOT(CBFS)@0x1000 0xbb9000
- RO_UNUSED_2 at 0xbba000 0x1000
- }
+ SI_DESC at 0x0 0x1000
+ IFWI at 0x1000 0x2ff000
+ FMAP at 0x300000 0x800
+ COREBOOT(CBFS)@0x300800 0xb9d800
+ UNIFIED_MRC_CACHE at 0xe9e000 0x21000 {
+ RECOVERY_MRC_CACHE at 0x0 0x10000
+ RW_MRC_CACHE at 0x10000 0x10000
+ RW_VAR_MRC_CACHE at 0x20000 0x1000
}
- MISC_RW at 0xe00000 0x30000 {
- UNIFIED_MRC_CACHE at 0x0 0x21000 {
- RECOVERY_MRC_CACHE at 0x0 0x10000
- RW_MRC_CACHE at 0x10000 0x10000
- RW_VAR_MRC_CACHE at 0x20000 0x1000
- }
- RW_ELOG at 0x21000 0x3000
- RW_SHARED at 0x24000 0x4000 {
- SHARED_DATA at 0x0 0x2000
- VBLOCK_DEV at 0x2000 0x2000
- }
- RW_VPD at 0x28000 0x2000
- RW_NVRAM at 0x2a000 0x6000
- }
- BIOS_UNUSABLE at 0xe30000 0xcf000
+ BIOS_UNUSABLE at 0xebf000 0x40000
DEVICE_EXTENSION at 0xeff000 0x100000
- # Currently, it is required that the BIOS region be a multiple of 8KiB.
- # This is required so that the recovery mechanism can find SIGN_CSE
- # region aligned to 4K at the center of BIOS region. Since the
- # descriptor at the beginning uses 4K and BIOS starts at an offset of
- # 4K, a hole of 4K is created towards the end of the flash to compensate
- # for the size requirement of BIOS region.
- # FIT tool thus creates descriptor with following regions:
- # Descriptor --> 0 to 4K
- # BIOS --> 4K to 0xf7f000
- # Device ext --> 0xf7f000 to 0xfff000
UNUSED_HOLE at 0xfff000 0x1000
}
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