[coreboot-gerrit] New patch to review for coreboot: drivers/intel/fsp1_1: Only display MMCONF address if supported

[Lee Leahy (leroy.p.leahy@intel.com)]

Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18801

-gerrit

commit 05d591694ba0241258863ebfc5415e1e685929d1
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Mon Mar 13 17:36:39 2017 -0700

    drivers/intel/fsp1_1: Only display MMCONF address if supported
    
    Disable the display of the MMCONF_BASE_ADDRESS if it is not supported.
    
    TEST=Build and run on Galileo Gen2
    
    Change-Id: Ie4f0fbf264662b5bc12ca923f25395e5e91defea
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/drivers/intel/fsp1_1/romstage.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index 73fb66d..3933b2e 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -60,8 +60,9 @@ asmlinkage void *romstage_main(FSP_INFO_HEADER *fih)
 	memset(&pei_data, 0, sizeof(pei_data));
 
 	/* Display parameters */
-	printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n",
-		CONFIG_MMCONF_BASE_ADDRESS);
+	if (!IS_ENABLED(CONFIG_NO_MMCONF_SUPPORT))
+		printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n",
+			CONFIG_MMCONF_BASE_ADDRESS);
 	printk(BIOS_INFO, "Using FSP 1.1\n");
 
 	/* Display FSP banner */