[coreboot-gerrit] New patch to review for coreboot: commonlib: Wrap lines at 80 columns

Lee Leahy (leroy.p.leahy@intel.com) gerrit at coreboot.org
Fri Mar 10 20:11:19 CET 2017


Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18751

-gerrit

commit b59f2d015b883b2759114b639f3b2d74f5fc05ed
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Fri Mar 10 10:57:00 2017 -0800

    commonlib: Wrap lines at 80 columns
    
    Fix the following warning detected by checkpatch.pl:
    
    TEST=Build and run on Galileo Gen2
    
    Change-Id: I811763c6de57dfdf5456579f63e83dca29d37d61
    Signed-off-by: Lee Leahy <Leroy.P.Leahy at intel.com>
---
 src/commonlib/include/commonlib/coreboot_tables.h | 8 ++++----
 src/commonlib/lz4_wrapper.c                       | 3 ++-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h
index f11fad6..7c3130e 100644
--- a/src/commonlib/include/commonlib/coreboot_tables.h
+++ b/src/commonlib/include/commonlib/coreboot_tables.h
@@ -111,7 +111,7 @@ struct lb_memory_range {
 #define LB_MEM_NVS		 4	/* ACPI NVS Memory */
 #define LB_MEM_UNUSABLE		 5	/* Unusable address space */
 #define LB_MEM_VENDOR_RSVD	 6	/* Vendor Reserved */
-#define LB_MEM_TABLE		16	/* Ram configuration tables are kept in */
+#define LB_MEM_TABLE		16    /* Ram configuration tables are kept in */
 };
 
 struct lb_memory {
@@ -383,7 +383,7 @@ struct cmos_entries {
 	uint32_t bit;                /* starting bit from start of image */
 	uint32_t length;             /* length of field in bits */
 	uint32_t config;             /* e=enumeration, h=hex, r=reserved */
-	uint32_t config_id;          /* a number linking to an enumeration record */
+	uint32_t config_id;      /* a number linking to an enumeration record */
 #define CMOS_MAX_NAME_LENGTH 32
 	uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
 					       variable length int aligned */
@@ -425,8 +425,8 @@ struct	cmos_checksum {
 	/* In practice everything is byte aligned, but things are measured
 	 * in bits to be consistent.
 	 */
-	uint32_t range_start;	/* First bit that is checksummed (byte aligned) */
-	uint32_t range_end;	/* Last bit that is checksummed (byte aligned) */
+	uint32_t range_start; /* First bit that is checksummed (byte aligned) */
+	uint32_t range_end;   /* Last bit that is checksummed (byte aligned) */
 	uint32_t location;	/* First bit of the checksum (byte aligned) */
 	uint32_t type;		/* Checksum algorithm that is used */
 #define CHECKSUM_NONE	0
diff --git a/src/commonlib/lz4_wrapper.c b/src/commonlib/lz4_wrapper.c
index 3fb6ae0..e444f2c 100644
--- a/src/commonlib/lz4_wrapper.c
+++ b/src/commonlib/lz4_wrapper.c
@@ -170,7 +170,8 @@ size_t ulz4fn(const void *src, size_t srcn, void *dst, size_t dstn)
 		}
 
 		if (b.not_compressed) {
-			size_t size = MIN((uintptr_t)b.size, (uintptr_t)dst + dstn - (uintptr_t)out);
+			size_t size = MIN((uintptr_t)b.size, (uintptr_t)dst
+				+ dstn - (uintptr_t)out);
 			memcpy(out, in, size);
 			if (size < b.size)
 				break;		/* output overrun */



More information about the coreboot-gerrit mailing list