[coreboot-gerrit] Patch set updated for coreboot: src/include: Move trailing statements to next line

Lee Leahy (leroy.p.leahy@intel.com) gerrit at coreboot.org
Wed Mar 8 20:06:09 CET 2017


Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18643

-gerrit

commit 08bb07749505e4e318c6e112a223d6ea5fedf067
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Tue Mar 7 11:44:05 2017 -0800

    src/include: Move trailing statements to next line
    
    Fix the following error detected by checkpatch.pl:
    
    ERROR: trailing statements should be on next line
    
    TEST=Build and run on Galileo Gen2
    
    Change-Id: I169f520db6f62dfea50d2bb8fb69a8e8257f86c7
    Signed-off-by: Lee Leahy <Leroy.P.Leahy at intel.com>
---
 src/include/assert.h                | 6 ++++--
 src/include/cpu/amd/model_fxx_rev.h | 6 ++++--
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/include/assert.h b/src/include/assert.h
index 1985389..90cc2a8 100644
--- a/src/include/assert.h
+++ b/src/include/assert.h
@@ -24,13 +24,15 @@
 	if (!(x)) {						\
 		printk(BIOS_EMERG, "ASSERTION ERROR: file '%s'"	\
 			", line %d\n", __FILE__, __LINE__);	\
-		if (IS_ENABLED(CONFIG_FATAL_ASSERTS)) hlt();	\
+		if (IS_ENABLED(CONFIG_FATAL_ASSERTS))		\
+			hlt();					\
 	}							\
 }
 #define BUG() {							\
 	printk(BIOS_EMERG, "ERROR: BUG ENCOUNTERED at file '%s'"\
 		", line %d\n", __FILE__, __LINE__);		\
-	if (IS_ENABLED(CONFIG_FATAL_ASSERTS)) hlt();		\
+	if (IS_ENABLED(CONFIG_FATAL_ASSERTS))			\
+		hlt();						\
 }
 
 #define assert(statement)	ASSERT(statement)
diff --git a/src/include/cpu/amd/model_fxx_rev.h b/src/include/cpu/amd/model_fxx_rev.h
index 4a217b2..6bb8b43 100644
--- a/src/include/cpu/amd/model_fxx_rev.h
+++ b/src/include/cpu/amd/model_fxx_rev.h
@@ -73,7 +73,8 @@ static inline int is_e0_later_in_bsp(int nodeid)
 	if (IS_ENABLED(CONFIG_K8_REV_F_SUPPORT))
 		return 1;
 
-	if (nodeid == 0) { // we don't need to do that for node 0 in core0/node0
+	// we don't need to do that for node 0 in core0/node0
+	if (nodeid == 0) {
 		return !is_cpu_pre_e0();
 	}
 
@@ -87,7 +88,8 @@ static inline int is_e0_later_in_bsp(int nodeid)
 	val = pci_read_config32(dev, 0x80);
 	e0_later = !!(val & (1<<3));
 
-	if (e0_later) { // pre_e0 bit 3 always be 0 and can not be changed
+	// pre_e0 bit 3 always be 0 and can not be changed
+	if (e0_later) {
 		pci_write_config32(dev, 0x80, val_old); // restore it
 	}
 



More information about the coreboot-gerrit mailing list