[coreboot-gerrit] Patch merged into coreboot/master: amd/pi/hudson: Move APIC enable to CPU file

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 03e6a455a38a5ba0b8146085c215fb324d161f36
Author: Marshall Dawson <marshalldawson3rd at gmail.com>
Date:   Sun Feb 12 10:31:15 2017 -0700

    amd/pi/hudson: Move APIC enable to CPU file
    
    Relocate the enabling of the LAPIC out of the southbridge source and
    surround it with a check for CONFIG_UDELAY_LAPIC (typical for AMD
    systems).  The LAPIC is now enabled for all cores; not only the BSP,
    and not only when the UART is used.
    
    This solves the problem of APs not having their APICs enabled when
    the timer is expected to be functional, e.g. verstage often uses
    do_printk_va_list() instead of do_printk() which exits early for
    APs when CONFIG_SQUELCH_EARLY_SMP=y.
    
    The changes were tested with two Gardenia builds, one using verstage
    and another with CONFIG_SQUELCH_EARLY_SMP=n.
    
    Original-Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
    Original-Reviewed-by: Marc Jones <marcj303 at gmail.com>
    (cherry picked from commit 93ffc311165f19d4192a5489051fa4264cd8e0ad)
    
    Change-Id: Ieaecc0bf921ee0d2691a8082f2431ea4d0c33749
    Signed-off-by: Marc Jones <marcj303 at gmail.com>
    Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
    Reviewed-on: https://review.coreboot.org/18436
    Tested-by: build bot (Jenkins)
    Reviewed-by: Kyösti Mälkki <kyosti.malkki at gmail.com>


See https://review.coreboot.org/18436 for details.

-gerrit