[coreboot-gerrit] Patch merged into coreboot/master: amd/pi/hudson: Add early SPI setup

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 91dea4a6482cf6ebe4d4bc434fbcd566cedb3941
Author: Marshall Dawson <marshalldawson3rd at gmail.com>
Date:   Fri Feb 10 16:03:54 2017 -0700

    amd/pi/hudson: Add early SPI setup
    
    Add some generic functions that can configure the SPI interface to
    have faster performance.
    
    Given that the hudson files are used across many generations of FCHs,
    make sure to refer to the appropriate BKDG or RRG before using the
    functions.  Notable differences:
     * Hudson 1 defines read mode in CNTRL0 differently than later gens
     * Hudson 1 supports setting NormSpeed in Cntr1 but Hudson3 allows
       setting FastSpeed as well
     * Kabini, Mullins, Carrizo and Stoney Ridge contain a "new" SPI100
       controller
    
    Original-Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
    Original-Reviewed-by: Marc Jones <marcj303 at gmail.com>
    (cherry picked from commit 1922d6f424dcf1f42e2f21fb7c6d53d7bcc247d0)
    
    Change-Id: Id12440e67bc575dbe4b980ef1da931d7bfae188d
    Signed-off-by: Marc Jones <marcj303 at gmail.com>
    Reviewed-on: https://review.coreboot.org/18442
    Tested-by: build bot (Jenkins)
    Reviewed-by: Kyösti Mälkki <kyosti.malkki at gmail.com>


See https://review.coreboot.org/18442 for details.

-gerrit