[coreboot-gerrit] New patch to review for coreboot: AGESA fam14: Sanitize headerfile

Mon Mar 6 12:16:56 CET 2017

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18585

-gerrit

commit 481c47e6b8bcb3cb7ffbad137ac8e987b55a431f
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sun Mar 5 14:07:32 2017 +0200

    AGESA fam14: Sanitize headerfile
    
    This file is only static defines.
    
    Change-Id: Id50a0eba1ce240df36da9bd6b2f39a263fa613df
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/mainboard/amd/inagua/PlatformGnbPcieComplex.h             | 4 ----
 src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h          | 5 -----
 src/mainboard/amd/south_station/PlatformGnbPcieComplex.h      | 4 ----
 src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h            | 4 ----
 src/mainboard/amd/union_station/PlatformGnbPcieComplex.h      | 4 ----
 src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h          | 4 ----
 src/mainboard/elmex/pcm205400/PlatformGnbPcieComplex.h        | 5 -----
 src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h      | 5 -----
 src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h    | 3 ---
 src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h | 5 -----
 src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h      | 5 -----
 src/mainboard/pcengines/apu1/PlatformGnbPcieComplex.h         | 5 -----
 12 files changed, 53 deletions(-)

diff --git a/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h b/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h
index 60045e1..30f674a 100644
--- a/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h
+++ b/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h
@@ -16,10 +16,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
 //GNB GPP Port4
 #define GNB_GPP_PORT4_PORT_PRESENT      1  //0:Disable 1:Enable
 #define GNB_GPP_PORT4_SPEED_MODE        2  //0:Auto 1:GEN1 2:GEN2
diff --git a/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h b/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h
index 4132c7c..0342e8e 100644
--- a/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h
+++ b/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h
@@ -16,11 +16,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-#include <cpu/amd/agesa/s3_resume.h>
-
 //GNB GPP Port4
 #define GNB_GPP_PORT4_PORT_PRESENT		1	//0:Disable 1:Enable
 #define GNB_GPP_PORT4_SPEED_MODE		2	//0:Auto 1:GEN1 2:GEN2
diff --git a/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h b/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h
index 001ed16..ee8e499 100644
--- a/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h
+++ b/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h
@@ -16,10 +16,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
 //GNB GPP Port4
 #define GNB_GPP_PORT4_PORT_PRESENT      1  //0:Disable 1:Enable
 #define GNB_GPP_PORT4_SPEED_MODE        2  //0:Auto 1:GEN1 2:GEN2
diff --git a/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h b/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h
index 001ed16..ee8e499 100644
--- a/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h
+++ b/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h
@@ -16,10 +16,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
 //GNB GPP Port4
 #define GNB_GPP_PORT4_PORT_PRESENT      1  //0:Disable 1:Enable
 #define GNB_GPP_PORT4_SPEED_MODE        2  //0:Auto 1:GEN1 2:GEN2
diff --git a/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h b/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h
index 001ed16..ee8e499 100644
--- a/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h
+++ b/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h
@@ -16,10 +16,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
 //GNB GPP Port4
 #define GNB_GPP_PORT4_PORT_PRESENT      1  //0:Disable 1:Enable
 #define GNB_GPP_PORT4_SPEED_MODE        2  //0:Auto 1:GEN1 2:GEN2
diff --git a/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h b/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h
index 001ed16..ee8e499 100644
--- a/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h
+++ b/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h
@@ -16,10 +16,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-
 //GNB GPP Port4
 #define GNB_GPP_PORT4_PORT_PRESENT      1  //0:Disable 1:Enable
 #define GNB_GPP_PORT4_SPEED_MODE        2  //0:Auto 1:GEN1 2:GEN2
diff --git a/src/mainboard/elmex/pcm205400/PlatformGnbPcieComplex.h b/src/mainboard/elmex/pcm205400/PlatformGnbPcieComplex.h
index 0f3fdc6..0bea897 100644
--- a/src/mainboard/elmex/pcm205400/PlatformGnbPcieComplex.h
+++ b/src/mainboard/elmex/pcm205400/PlatformGnbPcieComplex.h
@@ -16,11 +16,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-#include <cpu/amd/agesa/s3_resume.h>
-
 /*
  * GNB GPP Port4
  * GNB_GPP_PORT4_PORT_PRESENT	0:Disable 1:Enable
diff --git a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h
index 66618ae..acdb655 100644
--- a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h
+++ b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h
@@ -17,11 +17,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-#include <cpu/amd/agesa/s3_resume.h>
-
 //GNB GPP Port4
 #define GNB_GPP_PORT4_PORT_PRESENT		1	//0:Disable 1:Enable
 #define GNB_GPP_PORT4_SPEED_MODE		2	//0:Auto 1:GEN1 2:GEN2
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
index a91bd0f..782f5c2 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
@@ -17,9 +17,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include <vendorcode/amd/agesa/f14/AGESA.h>
-#include <amdlib.h>
-
 /**
  * @brief Graphic NorthBridge (GNB) General Purpose Port (GPP)
  *
diff --git a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h
index 9f99f32..0f0b41b 100644
--- a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h
+++ b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h
@@ -16,11 +16,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-#include <cpu/amd/agesa/s3_resume.h>
-
 //GNB GPP Port4
 #define GNB_GPP_PORT4_PORT_PRESENT		1	//0:Disable 1:Enable
 #define GNB_GPP_PORT4_SPEED_MODE		2	//0:Auto 1:GEN1 2:GEN2
diff --git a/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h b/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h
index 50c8f08..017ea77 100644
--- a/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h
+++ b/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h
@@ -16,11 +16,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-#include <cpu/amd/agesa/s3_resume.h>
-
 //GNB GPP Port4
 #define GNB_GPP_PORT4_PORT_PRESENT		1	//0:Disable 1:Enable
 #define GNB_GPP_PORT4_SPEED_MODE		2	//0:Auto 1:GEN1 2:GEN2
diff --git a/src/mainboard/pcengines/apu1/PlatformGnbPcieComplex.h b/src/mainboard/pcengines/apu1/PlatformGnbPcieComplex.h
index bb4ba86..64adf5c 100644
--- a/src/mainboard/pcengines/apu1/PlatformGnbPcieComplex.h
+++ b/src/mainboard/pcengines/apu1/PlatformGnbPcieComplex.h
@@ -17,11 +17,6 @@
 #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H
 #define _PLATFORM_GNB_PCIE_COMPLEX_H
 
-#include "Porting.h"
-#include "AGESA.h"
-#include "amdlib.h"
-#include <cpu/amd/agesa/s3_resume.h>
-
 //GNB GPP Port4
 #define GNB_GPP_PORT4_PORT_PRESENT		1	//0:Disable 1:Enable
 #define GNB_GPP_PORT4_SPEED_MODE		2	//0:Auto 1:GEN1 2:GEN2

