[coreboot-gerrit] New patch to review for coreboot: asrock/e350m1: Include ASL for PS/2 controller
Paul Menzel (paulepanter@users.sourceforge.net)
gerrit at coreboot.org
Sun Mar 5 09:58:30 CET 2017
Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18574
-gerrit
commit 317f0a4fb7ccbc20c2138e89e6bf73926f94d11c
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date: Sat Mar 4 10:02:24 2017 +0100
asrock/e350m1: Include ASL for PS/2 controller
On the ASRock E350M1, with Linux 4.10 after resuming from S3, the PS/2
keyboard does not work. Adding the ASL code, fixes this.
The Linux messages change like below.
```
kernel: i8042: PNP: No PS/2 controller found.
kernel: i8042: Probing ports directly.
kernel: serio: i8042 KBD port at 0x60,0x64 irq 1
kernel: serio: i8042 AUX port at 0x60,0x64 irq 12
kernel: mousedev: PS/2 mouse device common for all mice
```
```
kernel: i8042: PNP: PS/2 Controller [PNP0303:PS2K] at 0x60,0x64 irq 1
kernel: i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp
kernel: serio: i8042 KBD port at 0x60,0x64 irq 1
kernel: mousedev: PS/2 mouse device common for all mice
```
Change-Id: I0a06311860398cac9cf1a077e3aba75da779f45d
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
src/mainboard/asrock/e350m1/acpi/superio.asl | 1 +
src/mainboard/asrock/e350m1/dsdt.asl | 2 ++
2 files changed, 3 insertions(+)
diff --git a/src/mainboard/asrock/e350m1/acpi/superio.asl b/src/mainboard/asrock/e350m1/acpi/superio.asl
index e69de29..f2b35ba 100644
--- a/src/mainboard/asrock/e350m1/acpi/superio.asl
+++ b/src/mainboard/asrock/e350m1/acpi/superio.asl
@@ -0,0 +1 @@
+#include <drivers/pc80/pc/ps2_controller.asl>
diff --git a/src/mainboard/asrock/e350m1/dsdt.asl b/src/mainboard/asrock/e350m1/dsdt.asl
index 2566371..4b48935 100644
--- a/src/mainboard/asrock/e350m1/dsdt.asl
+++ b/src/mainboard/asrock/e350m1/dsdt.asl
@@ -46,6 +46,8 @@ DefinitionBlock (
}
} /* End Scope(_SB) */
+ #include "acpi/superio.asl"
+
/* Contains the supported sleep states for this chipset */
#include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl>
More information about the coreboot-gerrit
mailing list