[coreboot-gerrit] New patch to review for coreboot: soc/intel/skylake: Clean up Systemagent code

[Subrata Banik (subrata.banik@intel.com)]

Subrata Banik (subrata.banik at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18566

-gerrit

commit 90e28edc4cd161c45b766e55ba9ebd542f221b41
Author: Subrata Banik <subrata.banik at intel.com>
Date:   Sat Mar 4 23:37:28 2017 +0530

    soc/intel/skylake: Clean up Systemagent code
    
    Use common systemagent header.
    
    Change-Id: I0fa0a60f680b9b00b7f26f1875c553612b123a8e
    Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
 src/soc/intel/skylake/include/soc/iomap.h       |  3 +
 src/soc/intel/skylake/include/soc/systemagent.h | 78 +------------------------
 2 files changed, 4 insertions(+), 77 deletions(-)

diff --git a/src/soc/intel/skylake/include/soc/iomap.h b/src/soc/intel/skylake/include/soc/iomap.h
index e736d3b..9f50c48 100644
--- a/src/soc/intel/skylake/include/soc/iomap.h
+++ b/src/soc/intel/skylake/include/soc/iomap.h
@@ -58,6 +58,9 @@
 
 #define HECI1_BASE_ADDRESS	0xfed1a000
 
+/* CPU Trace reserved memory size */
+#define TRACE_MEMORY_SIZE       0x8000000       /* 128MiB */
+
 /*
  * I/O port address space
  */
diff --git a/src/soc/intel/skylake/include/soc/systemagent.h b/src/soc/intel/skylake/include/soc/systemagent.h
index c82f691..81c6dd7 100644
--- a/src/soc/intel/skylake/include/soc/systemagent.h
+++ b/src/soc/intel/skylake/include/soc/systemagent.h
@@ -18,6 +18,7 @@
 #ifndef _SOC_SYSTEMAGENT_H_
 #define _SOC_SYSTEMAGENT_H_
 
+#include <intelblocks/systemagent.h>
 #include <soc/iomap.h>
 
 #define SA_IGD_OPROM_VENDEV	0x80860406
@@ -41,89 +42,12 @@
 #define MCH_KABYLAKE_ID_Y	0x590c
 #define MCH_KABYLAKE_ID_H	0x5910
 
-/* Device 0:0.0 PCI configuration space */
-
-#define EPBAR		0x40
-#define MCHBAR		0x48
-#define PCIEXBAR	0x60
-#define DMIBAR		0x68
-#define GGC		0x50	/* GMCH Graphics Control */
-#define DEVEN		0x54	/* Device Enable */
-#define  DEVEN_D7EN	(1 << 14)
-#define  DEVEN_D4EN	(1 << 7)
-#define  DEVEN_D3EN	(1 << 5)
-#define  DEVEN_D2EN	(1 << 4)
-#define  DEVEN_D1F0EN	(1 << 3)
-#define  DEVEN_D1F1EN	(1 << 2)
-#define  DEVEN_D1F2EN	(1 << 1)
-#define  DEVEN_D0EN	(1 << 0)
-#define DPR		0x5c
-#define  DPR_EPM	(1 << 2)
-#define  DPR_PRS	(1 << 1)
-#define  DPR_SIZE_MASK	0xff0
-
-#define PAM0		0x80
-#define PAM1		0x81
-#define PAM2		0x82
-#define PAM3		0x83
-#define PAM4		0x84
-#define PAM5		0x85
-#define PAM6		0x86
-
-#define SMRAM		0x88	/* System Management RAM Control */
-#define  D_OPEN		(1 << 6)
-#define  D_CLS		(1 << 5)
-#define  D_LCK		(1 << 4)
-#define  G_SMRAME	(1 << 3)
-#define  C_BASE_SEG	((0 << 2) | (1 << 1) | (0 << 0))
-
-#define MESEG_BASE	0x70	/* Management Engine Base. */
-#define MESEG_LIMIT	0x78	/* Management Engine Limit. */
-#define REMAPBASE	0x90	/* Remap base. */
-#define REMAPLIMIT	0x98	/* Remap limit. */
-#define TOM		0xa0	/* Top of DRAM in memory controller space. */
-#define TOUUD		0xa8	/* Top of Upper Usable DRAM */
-#define BDSM		0xb0	/* Base Data Stolen Memory */
-#define BGSM		0xb4	/* Base GTT Stolen Memory */
-#define TSEG		0xb8	/* TSEG base */
-#define TOLUD		0xbc	/* Top of Low Used Memory */
-#define SKPAD		0xdc	/* Scratchpad Data */
-
 /* MCHBAR */
 
 #define MCHBAR8(x)	(*(volatile u8 *)(MCH_BASE_ADDRESS + x))
 #define MCHBAR16(x)	(*(volatile u16 *)(MCH_BASE_ADDRESS + x))
 #define MCHBAR32(x)	(*(volatile u32 *)(MCH_BASE_ADDRESS + x))
 
-#define MCHBAR_PEI_VERSION	0x5034
-#define BIOS_RESET_CPL		0x5da8
-#define EDRAMBAR		0x5408
-#define MCH_PAIR		0x5418
-#define GDXCBAR			0x5420
-
-#define MCH_PKG_POWER_LIMIT_LO	0x59a0
-#define MCH_PKG_POWER_LIMIT_HI	0x59a4
-#define MCH_DDR_POWER_LIMIT_LO	0x58e0
-#define MCH_DDR_POWER_LIMIT_HI	0x58e4
-
-/* PCODE MMIO communications live in the MCHBAR. */
-#define BIOS_MAILBOX_INTERFACE			0x5da4
-#define  MAILBOX_RUN_BUSY			(1 << 31)
-/* Errors are returned back in bits 7:0. */
-#define  MAILBOX_BIOS_ERROR_NONE		0
-#define  MAILBOX_BIOS_ERROR_INVALID_COMMAND	1
-#define  MAILBOX_BIOS_ERROR_TIMEOUT		2
-#define  MAILBOX_BIOS_ERROR_ILLEGAL_DATA	3
-#define  MAILBOX_BIOS_ERROR_RESERVED		4
-#define  MAILBOX_BIOS_ERROR_ILLEGAL_VR_ID	5
-#define  MAILBOX_BIOS_ERROR_VR_INTERFACE_LOCKED	6
-#define  MAILBOX_BIOS_ERROR_VR_ERROR		7
-/* Data is passed through bits 31:0 of the data register. */
-#define BIOS_MAILBOX_DATA			0x5da0
-
-/* CPU Trace reserved memory size */
-#define TRACE_MEMORY_SIZE	0x8000000	/* 128MiB */
-
 /* System Agent identification */
 u8 systemagent_revision(void);