[coreboot-gerrit] Patch set updated for coreboot: amd/pi/hudson: Consolidate BITn definitions
Marshall Dawson (marshalldawson3rd@gmail.com)
gerrit at coreboot.org
Fri Mar 3 00:07:26 CET 2017
Marshall Dawson (marshalldawson3rd at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18440
-gerrit
commit 88199f0d7189fbcb5da355f5883103e27b2569ca
Author: Marshall Dawson <marshalldawson3rd at gmail.com>
Date: Sun Jan 29 17:22:36 2017 -0700
amd/pi/hudson: Consolidate BITn definitions
Remove unused definitions from a .c file and use the BIT(n) macro
found in types.h instead. Convert existing definitions to BIT(n).
Orignial-Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
Original-Reviewed-by: Marc Jones <marcj303 at gmail.com>
(cherry picked from commit f403d12b49985ee9d9b339a6659b60ef1560519c)
Change-Id: I24105bf75263236dbdbc2666f03033069d1d36d2
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
src/southbridge/amd/pi/hudson/hudson.h | 65 +++++++++++++++++-----------------
src/southbridge/amd/pi/hudson/sm.c | 35 ------------------
2 files changed, 33 insertions(+), 67 deletions(-)
diff --git a/src/southbridge/amd/pi/hudson/hudson.h b/src/southbridge/amd/pi/hudson/hudson.h
index 23d9b31..fc37467 100644
--- a/src/southbridge/amd/pi/hudson/hudson.h
+++ b/src/southbridge/amd/pi/hudson/hudson.h
@@ -17,6 +17,7 @@
#ifndef HUDSON_H
#define HUDSON_H
+#include <types.h>
#include <device/pci_ids.h>
#include <device/device.h>
#include "chip.h"
@@ -52,38 +53,38 @@
#define SPI_BASE_ADDRESS 0xFEC10000
#define LPC_IO_PORT_DECODE_ENABLE 0x44
-#define DECODE_ENABLE_PARALLEL_PORT0 (1 << 0)
-#define DECODE_ENABLE_PARALLEL_PORT1 (1 << 1)
-#define DECODE_ENABLE_PARALLEL_PORT2 (1 << 2)
-#define DECODE_ENABLE_PARALLEL_PORT3 (1 << 3)
-#define DECODE_ENABLE_PARALLEL_PORT4 (1 << 4)
-#define DECODE_ENABLE_PARALLEL_PORT5 (1 << 5)
-#define DECODE_ENABLE_SERIAL_PORT0 (1 << 6)
-#define DECODE_ENABLE_SERIAL_PORT1 (1 << 7)
-#define DECODE_ENABLE_SERIAL_PORT2 (1 << 8)
-#define DECODE_ENABLE_SERIAL_PORT3 (1 << 9)
-#define DECODE_ENABLE_SERIAL_PORT4 (1 << 10)
-#define DECODE_ENABLE_SERIAL_PORT5 (1 << 11)
-#define DECODE_ENABLE_SERIAL_PORT6 (1 << 12)
-#define DECODE_ENABLE_SERIAL_PORT7 (1 << 13)
-#define DECODE_ENABLE_AUDIO_PORT0 (1 << 14)
-#define DECODE_ENABLE_AUDIO_PORT1 (1 << 15)
-#define DECODE_ENABLE_AUDIO_PORT2 (1 << 16)
-#define DECODE_ENABLE_AUDIO_PORT3 (1 << 17)
-#define DECODE_ENABLE_MIDI_PORT0 (1 << 18)
-#define DECODE_ENABLE_MIDI_PORT1 (1 << 19)
-#define DECODE_ENABLE_MIDI_PORT2 (1 << 20)
-#define DECODE_ENABLE_MIDI_PORT3 (1 << 21)
-#define DECODE_ENABLE_MSS_PORT0 (1 << 22)
-#define DECODE_ENABLE_MSS_PORT1 (1 << 23)
-#define DECODE_ENABLE_MSS_PORT2 (1 << 24)
-#define DECODE_ENABLE_MSS_PORT3 (1 << 25)
-#define DECODE_ENABLE_FDC_PORT0 (1 << 26)
-#define DECODE_ENABLE_FDC_PORT1 (1 << 27)
-#define DECODE_ENABLE_GAME_PORT (1 << 28)
-#define DECODE_ENABLE_KBC_PORT (1 << 29)
-#define DECODE_ENABLE_ACPIUC_PORT (1 << 30)
-#define DECODE_ENABLE_ADLIB_PORT (1 << 31)
+#define DECODE_ENABLE_PARALLEL_PORT0 BIT(0)
+#define DECODE_ENABLE_PARALLEL_PORT1 BIT(1)
+#define DECODE_ENABLE_PARALLEL_PORT2 BIT(2)
+#define DECODE_ENABLE_PARALLEL_PORT3 BIT(3)
+#define DECODE_ENABLE_PARALLEL_PORT4 BIT(4)
+#define DECODE_ENABLE_PARALLEL_PORT5 BIT(5)
+#define DECODE_ENABLE_SERIAL_PORT0 BIT(6)
+#define DECODE_ENABLE_SERIAL_PORT1 BIT(7)
+#define DECODE_ENABLE_SERIAL_PORT2 BIT(8)
+#define DECODE_ENABLE_SERIAL_PORT3 BIT(9)
+#define DECODE_ENABLE_SERIAL_PORT4 BIT(10)
+#define DECODE_ENABLE_SERIAL_PORT5 BIT(11)
+#define DECODE_ENABLE_SERIAL_PORT6 BIT(12)
+#define DECODE_ENABLE_SERIAL_PORT7 BIT(13)
+#define DECODE_ENABLE_AUDIO_PORT0 BIT(14)
+#define DECODE_ENABLE_AUDIO_PORT1 BIT(15)
+#define DECODE_ENABLE_AUDIO_PORT2 BIT(16)
+#define DECODE_ENABLE_AUDIO_PORT3 BIT(17)
+#define DECODE_ENABLE_MIDI_PORT0 BIT(18)
+#define DECODE_ENABLE_MIDI_PORT1 BIT(19)
+#define DECODE_ENABLE_MIDI_PORT2 BIT(20)
+#define DECODE_ENABLE_MIDI_PORT3 BIT(21)
+#define DECODE_ENABLE_MSS_PORT0 BIT(22)
+#define DECODE_ENABLE_MSS_PORT1 BIT(23)
+#define DECODE_ENABLE_MSS_PORT2 BIT(24)
+#define DECODE_ENABLE_MSS_PORT3 BIT(25)
+#define DECODE_ENABLE_FDC_PORT0 BIT(26)
+#define DECODE_ENABLE_FDC_PORT1 BIT(27)
+#define DECODE_ENABLE_GAME_PORT BIT(28)
+#define DECODE_ENABLE_KBC_PORT BIT(29)
+#define DECODE_ENABLE_ACPIUC_PORT BIT(30)
+#define DECODE_ENABLE_ADLIB_PORT BIT(31)
static inline int hudson_sata_enable(void)
{
diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c
index 74367a7..db29d10 100644
--- a/src/southbridge/amd/pi/hudson/sm.c
+++ b/src/southbridge/amd/pi/hudson/sm.c
@@ -36,41 +36,6 @@
#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
#endif
-#define BIT0 (1 << 0)
-#define BIT1 (1 << 1)
-#define BIT2 (1 << 2)
-#define BIT3 (1 << 3)
-#define BIT4 (1 << 4)
-#define BIT5 (1 << 5)
-#define BIT6 (1 << 6)
-#define BIT7 (1 << 7)
-
-#define BIT8 (1 << 8 )
-#define BIT9 (1 << 9 )
-#define BIT10 (1 << 10)
-#define BIT11 (1 << 11)
-#define BIT12 (1 << 12)
-#define BIT13 (1 << 13)
-#define BIT14 (1 << 14)
-#define BIT15 (1 << 15)
-
-#define BIT16 (1 << 16)
-#define BIT17 (1 << 17)
-#define BIT18 (1 << 18)
-#define BIT19 (1 << 19)
-#define BIT20 (1 << 20)
-#define BIT21 (1 << 21)
-#define BIT22 (1 << 22)
-#define BIT23 (1 << 23)
-#define BIT24 (1 << 24)
-#define BIT25 (1 << 25)
-#define BIT26 (1 << 26)
-#define BIT27 (1 << 27)
-#define BIT28 (1 << 28)
-#define BIT29 (1 << 29)
-#define BIT30 (1 << 30)
-#define BIT31 (1 << 31)
-
/*
* HUDSON enables all USB controllers by default in SMBUS Control.
* HUDSON enables SATA by default in SMBUS Control.
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