[coreboot-gerrit] Change in coreboot[master]: google/fizz: Override PL2 and SysPL2 values

[Shelley Chen (Code Review)]

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/20420


Change subject: google/fizz: Override PL2 and SysPL2 values
......................................................................

google/fizz: Override PL2 and SysPL2 values

Set PL2 and SysPL2 for Fizz based on cpu id.

BUG=b:7473486, b:35775024
BRANCH=None
TEST=On bootup make sure PL2 and PsysPL2 values set
     properly (through debug output)

Change-Id: I5c46667fdae9d8eed5346a481753bb69f98a071b
Signed-off-by: Shelley Chen <shchen at chromium.org>
---
M src/mainboard/google/fizz/devicetree.cb
M src/mainboard/google/fizz/mainboard.c
2 files changed, 37 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/20420/1

diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index a493de5..d0bddba 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -210,7 +210,6 @@
 	}"
 
 	register "speed_shift_enable" = "1"
-	register "tdp_pl2_override" = "7"
 	register "tcc_offset" = "10"     # TCC of 90C
 
 	# Use default SD card detect GPIO configuration
diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c
index a925f08..75132bb 100644
--- a/src/mainboard/google/fizz/mainboard.c
+++ b/src/mainboard/google/fizz/mainboard.c
@@ -17,6 +17,8 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <ec/ec.h>
+#include <intelblocks/mp_init.h>
+#include <soc/cpu.h>
 #include <soc/pci_devs.h>
 #include <soc/nhlt.h>
 #include <vendorcode/google/chromeos/chromeos.h>
@@ -24,6 +26,41 @@
 static const char *oem_id = "GOOGLE";
 static const char *oem_table_id = "FIZZ";
 
+/*
+ * mainboard_get_pl2
+ *
+ * @return value Pl2 should be set to based on cpu id
+ *
+ * NOTE: This is purely based on cpu id, which only work for the
+ * current build because we have a different cpu id per sku.  However,
+ * on the next build, we'll have distinct board ids per sku.  We'll
+ * need to modify that at this point.
+ */
+u32 mainboard_get_pl2(void)
+{
+	struct cpuid_result cpuidr;
+
+	cpuidr = cpuid(1);
+	printk(BIOS_DEBUG, "CPU(1): 0x%x\n", cpuidr.eax);
+	if (cpuidr.eax == CPUID_KABYLAKE_Y0) {
+		/* i7 needs higher pl2 */
+		return 44;
+	}
+	return 29;
+}
+
+/*
+ * mainboard_get_psyspl2
+ *
+ * This is 90 Watts across all SKUs for Fizz
+ *
+ * @return value PsysPl2 should be set to
+ */
+u32 mainboard_get_psyspl2(void)
+{
+	return 90;
+}
+
 static void mainboard_init(device_t dev)
 {
 	mainboard_ec_init();

-- 
To view, visit https://review.coreboot.org/20420
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5c46667fdae9d8eed5346a481753bb69f98a071b
Gerrit-Change-Number: 20420
Gerrit-PatchSet: 1
Gerrit-Owner: Shelley Chen <shchen at google.com>
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