[coreboot-gerrit] Change in coreboot[master]: src/northbridge: add IS_ENABLED() around Kconfig symbol refe...
Martin Roth (Code Review)
gerrit at coreboot.org
Sun Jun 25 21:06:51 CEST 2017
Martin Roth has uploaded this change for review. ( https://review.coreboot.org/20347
Change subject: src/northbridge: add IS_ENABLED() around Kconfig symbol references
......................................................................
src/northbridge: add IS_ENABLED() around Kconfig symbol references
Change-Id: I1095944e65bfacd9e878840cc88f8a0a24ecde72
Signed-off-by: Martin Roth <martinroth at google.com>
---
M src/northbridge/via/cn700/raminit.c
M src/northbridge/via/cx700/early_smbus.c
M src/northbridge/via/cx700/lpc.c
M src/northbridge/via/cx700/raminit.c
M src/northbridge/via/cx700/vga.c
M src/northbridge/via/vx800/early_smbus.c
M src/northbridge/via/vx800/raminit.c
M src/northbridge/via/vx800/vga.c
M src/northbridge/via/vx900/lpc.c
9 files changed, 14 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/20347/1
diff --git a/src/northbridge/via/cn700/raminit.c b/src/northbridge/via/cn700/raminit.c
index 20c3c8c..e8a7a17 100644
--- a/src/northbridge/via/cn700/raminit.c
+++ b/src/northbridge/via/cn700/raminit.c
@@ -24,7 +24,7 @@
#include <delay.h>
#include "cn700.h"
-#if CONFIG_DEBUG_RAM_SETUP
+#if IS_ENABLED(CONFIG_DEBUG_RAM_SETUP)
#define PRINT_DEBUG_MEM(x) printk(BIOS_DEBUG, x)
#define PRINT_DEBUG_MEM_HEX8(x) printk(BIOS_DEBUG, "%02x", x)
#define PRINT_DEBUG_MEM_HEX16(x) printk(BIOS_DEBUG, "%04x", x)
diff --git a/src/northbridge/via/cx700/early_smbus.c b/src/northbridge/via/cx700/early_smbus.c
index e106f09..84a0de1 100644
--- a/src/northbridge/via/cx700/early_smbus.c
+++ b/src/northbridge/via/cx700/early_smbus.c
@@ -43,7 +43,7 @@
#define SMBUS_DELAY() outb(0x80, 0x80)
/* Internal functions */
-#if CONFIG_DEBUG_SMBUS
+#if IS_ENABLED(CONFIG_DEBUG_SMBUS)
static void smbus_print_error(unsigned char host_status_register, int loops)
{
/* Check if there actually was an error */
@@ -85,7 +85,7 @@
SMBUS_DELAY();
++loops;
}
-#if CONFIG_DEBUG_SMBUS
+#if IS_ENABLED(CONFIG_DEBUG_SMBUS)
/* Some systems seem to have a flakey SMBus. No need to spew a lot of
* errors on those, once we know that SMBus access is principally
* working.
@@ -211,7 +211,7 @@
}
/* Debugging Function */
-#if CONFIG_DEBUG_SMBUS
+#if IS_ENABLED(CONFIG_DEBUG_SMBUS)
static void dump_spd_data(const struct mem_controller *ctrl)
{
int dimm, offset, regs;
diff --git a/src/northbridge/via/cx700/lpc.c b/src/northbridge/via/cx700/lpc.c
index c90dab7..4915066 100644
--- a/src/northbridge/via/cx700/lpc.c
+++ b/src/northbridge/via/cx700/lpc.c
@@ -266,7 +266,7 @@
{
cx700_set_lpc_registers(dev);
-#if CONFIG_IOAPIC
+#if IS_ENABLED(CONFIG_IOAPIC)
#define IO_APIC_ID 2
setup_ioapic(VIO_APIC_VADDR, IO_APIC_ID);
#endif
diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c
index a75be41..682f3be 100644
--- a/src/northbridge/via/cx700/raminit.c
+++ b/src/northbridge/via/cx700/raminit.c
@@ -20,7 +20,7 @@
#include "registers.h"
/* Debugging macros. */
-#if CONFIG_DEBUG_RAM_SETUP
+#if IS_ENABLED(CONFIG_DEBUG_RAM_SETUP)
#define PRINTK_DEBUG(x...) printk(BIOS_DEBUG, x)
#else
#define PRINTK_DEBUG(x...)
diff --git a/src/northbridge/via/cx700/vga.c b/src/northbridge/via/cx700/vga.c
index 7cb84d2..093477a 100644
--- a/src/northbridge/via/cx700/vga.c
+++ b/src/northbridge/via/cx700/vga.c
@@ -27,7 +27,7 @@
#include <arch/interrupt.h>
#include "registers.h"
#include <x86emu/regs.h>
-#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_REALMODE)
#include <device/oprom/realmode/x86.h>
#endif
@@ -143,7 +143,7 @@
static void vga_enable_console(void)
{
-#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_REALMODE)
/* Call VGA BIOS int10 function 0x4f14 to enable main console
* Epia-M does not always autosense the main console so forcing
* it on is good.
diff --git a/src/northbridge/via/vx800/early_smbus.c b/src/northbridge/via/vx800/early_smbus.c
index 2c8d5bf..816fe28 100644
--- a/src/northbridge/via/vx800/early_smbus.c
+++ b/src/northbridge/via/vx800/early_smbus.c
@@ -45,7 +45,7 @@
#define SMBUS_DELAY() outb(0x80, 0x80)
-#if CONFIG_DEBUG_SMBUS
+#if IS_ENABLED(CONFIG_DEBUG_SMBUS)
#define DEBUG(x...) printk(BIOS_DEBUG, x)
#else
#define DEBUG(x...) while (0) { }
@@ -208,7 +208,7 @@
}
/* Debugging Function */
-#if CONFIG_DEBUG_SMBUS
+#if IS_ENABLED(CONFIG_DEBUG_SMBUS)
static void dump_spd_data(void)
{
int dimm, offset, regs;
diff --git a/src/northbridge/via/vx800/raminit.c b/src/northbridge/via/vx800/raminit.c
index 69b27c6..f97e2f5 100644
--- a/src/northbridge/via/vx800/raminit.c
+++ b/src/northbridge/via/vx800/raminit.c
@@ -24,7 +24,7 @@
#pragma clang diagnostic ignored "-Warray-bounds"
#endif
-#if CONFIG_DEBUG_RAM_SETUP
+#if IS_ENABLED(CONFIG_DEBUG_RAM_SETUP)
#define PRINT_DEBUG_MEM(x) printk(BIOS_DEBUG, x)
#define PRINT_DEBUG_MEM_HEX8(x) printk(BIOS_DEBUG, "%02x", x)
#define PRINT_DEBUG_MEM_HEX16(x) printk(BIOS_DEBUG, "%04x", x)
diff --git a/src/northbridge/via/vx800/vga.c b/src/northbridge/via/vx800/vga.c
index 70a916f..ce499b7 100644
--- a/src/northbridge/via/vx800/vga.c
+++ b/src/northbridge/via/vx800/vga.c
@@ -29,7 +29,7 @@
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
#include <x86emu/regs.h>
-#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_REALMODE)
#include <device/oprom/realmode/x86.h>
#endif
@@ -139,7 +139,7 @@
static void vga_enable_console(void)
{
-#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_REALMODE)
/* Call VGA BIOS int10 function 0x4f14 to enable main console
* Epia-M does not always autosense the main console so forcing
* it on is good.
diff --git a/src/northbridge/via/vx900/lpc.c b/src/northbridge/via/vx900/lpc.c
index a9d24df..b36aaed 100644
--- a/src/northbridge/via/vx900/lpc.c
+++ b/src/northbridge/via/vx900/lpc.c
@@ -198,7 +198,7 @@
.device = PCI_DEVICE_ID_VIA_VX900_LPC,
};
-#if CONFIG_PIRQ_ROUTE
+#if IS_ENABLED(CONFIG_PIRQ_ROUTE)
void pirq_assign_irqs(const u8 * pirq)
{
device_t lpc;
--
To view, visit https://review.coreboot.org/20347
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1095944e65bfacd9e878840cc88f8a0a24ecde72
Gerrit-Change-Number: 20347
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth at google.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20170625/47388c87/attachment-0001.html>
More information about the coreboot-gerrit
mailing list