[coreboot-gerrit] Change in coreboot[master]: device/oprom/yabel: add IS_ENABLED() around Kconfig symbol r...
Martin Roth (Code Review)
gerrit at coreboot.org
Sun Jun 25 21:05:40 CEST 2017
Martin Roth has uploaded this change for review. ( https://review.coreboot.org/20337
Change subject: device/oprom/yabel: add IS_ENABLED() around Kconfig symbol references
......................................................................
device/oprom/yabel: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
Change-Id: I82bf68a7ee54ff88f65aacc9eb0dbc30d013aae0
Signed-off-by: Martin Roth <martinroth at google.com>
---
M src/device/oprom/yabel/biosemu.c
M src/device/oprom/yabel/compat/functions.c
M src/device/oprom/yabel/device.c
M src/device/oprom/yabel/device.h
M src/device/oprom/yabel/interrupt.c
M src/device/oprom/yabel/io.c
M src/device/oprom/yabel/mem.c
M src/device/oprom/yabel/vbe.c
8 files changed, 50 insertions(+), 50 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/20337/1
diff --git a/src/device/oprom/yabel/biosemu.c b/src/device/oprom/yabel/biosemu.c
index a0a407f..a77157f 100644
--- a/src/device/oprom/yabel/biosemu.c
+++ b/src/device/oprom/yabel/biosemu.c
@@ -52,7 +52,7 @@
#include <device/device.h>
#include "compat/rtas.h"
-#if CONFIG_X86EMU_DEBUG_TIMINGS
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TIMINGS)
struct mono_time zero;
#endif
@@ -87,44 +87,44 @@
{
u8 *rom_image;
int i = 0;
-#if CONFIG_X86EMU_DEBUG
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
debug_flags = 0;
-#if CONFIG_X86EMU_DEBUG_JMP
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_JMP)
debug_flags |= DEBUG_JMP;
#endif
-#if CONFIG_X86EMU_DEBUG_TRACE
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TRACE)
debug_flags |= DEBUG_TRACE_X86EMU;
#endif
-#if CONFIG_X86EMU_DEBUG_PNP
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_PNP)
debug_flags |= DEBUG_PNP;
#endif
-#if CONFIG_X86EMU_DEBUG_DISK
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_DISK)
debug_flags |= DEBUG_DISK;
#endif
-#if CONFIG_X86EMU_DEBUG_PMM
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_PMM)
debug_flags |= DEBUG_PMM;
#endif
-#if CONFIG_X86EMU_DEBUG_VBE
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_VBE)
debug_flags |= DEBUG_VBE;
#endif
-#if CONFIG_X86EMU_DEBUG_INT10
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_INT10)
debug_flags |= DEBUG_PRINT_INT10;
#endif
-#if CONFIG_X86EMU_DEBUG_INTERRUPTS
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_INTERRUPTS)
debug_flags |= DEBUG_INTR;
#endif
-#if CONFIG_X86EMU_DEBUG_CHECK_VMEM_ACCESS
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_CHECK_VMEM_ACCESS)
debug_flags |= DEBUG_CHECK_VMEM_ACCESS;
#endif
-#if CONFIG_X86EMU_DEBUG_MEM
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_MEM)
debug_flags |= DEBUG_MEM;
#endif
-#if CONFIG_X86EMU_DEBUG_IO
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_IO)
debug_flags |= DEBUG_IO;
#endif
#endif
-#if CONFIG_X86EMU_DEBUG_TIMINGS
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG_TIMINGS)
/* required for i915tool compatible output */
zero.microseconds = 0;
#endif
@@ -345,7 +345,7 @@
* some boot device status in AX (see PNP BIOS Spec Section 3.3
*/
DEBUG_PRINTF_CS_IP("Option ROM Exit Status: %04x\n", M.x86.R_AX);
-#if CONFIG_X86EMU_DEBUG
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
DEBUG_PRINTF("Exit Status Decode:\n");
if (M.x86.R_AX & 0x100) { // bit 8
DEBUG_PRINTF
diff --git a/src/device/oprom/yabel/compat/functions.c b/src/device/oprom/yabel/compat/functions.c
index 283c3eb..5a51f18 100644
--- a/src/device/oprom/yabel/compat/functions.c
+++ b/src/device/oprom/yabel/compat/functions.c
@@ -45,7 +45,7 @@
#define VMEM_SIZE (1024 * 1024) /* 1 MB */
-#if !CONFIG_YABEL_DIRECTHW
+#if !IS_ENABLED(CONFIG_YABEL_DIRECTHW)
#if CONFIG_YABEL_VIRTMEM_LOCATION
u8* vmem = (u8 *) CONFIG_YABEL_VIRTMEM_LOCATION;
#else
@@ -63,7 +63,7 @@
biosemu(vmem, VMEM_SIZE, dev, addr);
-#if CONFIG_FRAMEBUFFER_SET_VESA_MODE
+#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
vbe_set_graphics();
#endif
}
@@ -73,7 +73,7 @@
u64 get_time(void)
{
u64 act = 0;
-#if CONFIG_ARCH_X86
+#if IS_ENABLED(CONFIG_ARCH_X86)
u32 eax, edx;
__asm__ __volatile__(
diff --git a/src/device/oprom/yabel/device.c b/src/device/oprom/yabel/device.c
index ee920d5..b3e5d19 100644
--- a/src/device/oprom/yabel/device.c
+++ b/src/device/oprom/yabel/device.c
@@ -58,7 +58,7 @@
u64 size;
} __attribute__ ((__packed__)) assigned_address_t;
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
/* coreboot version */
static void
@@ -131,7 +131,7 @@
}
// store last entry index of translate_address_array
taa_last_entry = taa_index - 1;
-#if CONFIG_X86EMU_DEBUG
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
//dump translate_address_array
printf("translate_address_array:\n");
translate_address_t ta;
@@ -215,7 +215,7 @@
}
// store last entry index of translate_address_array
taa_last_entry = taa_index - 1;
-#if CONFIG_X86EMU_DEBUG
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
//dump translate_address_array
printf("translate_address_array:\n");
translate_address_t ta;
@@ -247,7 +247,7 @@
translate_address_array[taa_index].address_offset = 0;
}
-#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
// to simulate accesses to legacy VGA Memory (0xA0000-0xBFFFF)
// we look for the first prefetchable memory BAR, if no prefetchable BAR found,
// we use the first memory BAR
@@ -309,7 +309,7 @@
{
u32 pci_config_0;
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_config_0 = pci_read_config32(bios_device.dev, 0x0);
#else
pci_config_0 =
@@ -371,7 +371,7 @@
memcpy(&pci_ds, (void *) (rom_base_addr + pci_ds_offset),
sizeof(pci_ds));
clr_ci();
-#if CONFIG_X86EMU_DEBUG
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
DEBUG_PRINTF("PCI Data Structure @%lx:\n",
rom_base_addr + pci_ds_offset);
dump((void *) &pci_ds, sizeof(pci_ds));
@@ -435,7 +435,7 @@
DEBUG_PRINTF("%s\n", __func__);
memset(&bios_device, 0, sizeof(bios_device));
-#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
bios_device.ihandle = of_open(device_name);
if (bios_device.ihandle == 0) {
DEBUG_PRINTF("%s is no valid device!\n", device_name);
@@ -446,7 +446,7 @@
bios_device.dev = device;
#endif
biosemu_dev_get_addr_info();
-#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
biosemu_dev_find_vmem_addr();
biosemu_dev_get_puid();
#endif
@@ -463,7 +463,7 @@
{
int i = 0;
translate_address_t ta;
-#if !CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if !IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
/* we don't need this hack for coreboot... we can access legacy areas */
//check if it is an access to legacy VGA Mem... if it is, map the address
//to the vmem BAR and then translate it...
diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h
index 72a4d53..98b5c07 100644
--- a/src/device/oprom/yabel/device.h
+++ b/src/device/oprom/yabel/device.h
@@ -105,7 +105,7 @@
} biosemu_device_t;
typedef struct {
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
unsigned long info;
#else
u8 info;
@@ -149,7 +149,7 @@
static inline void
out32le(void *addr, u32 val)
{
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
+#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
*((u32*) addr) = cpu_to_le32(val);
#else
asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr));
@@ -160,7 +160,7 @@
in32le(void *addr)
{
u32 val;
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
+#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
val = cpu_to_le32(*((u32 *) addr));
#else
asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr));
@@ -171,7 +171,7 @@
static inline void
out16le(void *addr, u16 val)
{
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
+#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
*((u16*) addr) = cpu_to_le16(val);
#else
asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr));
@@ -182,7 +182,7 @@
in16le(void *addr)
{
u16 val;
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
+#if IS_ENABLED(CONFIG_ARCH_X86) || IS_ENABLED(CONFIG_ARCH_ARM)
val = cpu_to_le16(*((u16*) addr));
#else
asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr));
diff --git a/src/device/oprom/yabel/interrupt.c b/src/device/oprom/yabel/interrupt.c
index e826fbf..67abe81 100644
--- a/src/device/oprom/yabel/interrupt.c
+++ b/src/device/oprom/yabel/interrupt.c
@@ -362,7 +362,7 @@
DEBUG_PRINTF_INTR("%s(): function: %x: PCI Find Device\n",
__func__, M.x86.R_AX);
/* FixME: support SI != 0 */
-#if CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES
+#if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES)
dev = dev_find_device(M.x86.R_DX, M.x86.R_CX, 0);
if (dev != 0) {
DEBUG_PRINTF_INTR
@@ -403,7 +403,7 @@
offs = M.x86.R_DI;
DEBUG_PRINTF_INTR("%s(): function: %x: PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n",
__func__, M.x86.R_AX, bus, devfn, offs);
-#if CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES
+#if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES)
dev = dev_find_slot(bus, devfn);
DEBUG_PRINTF_INTR("%s(): function: %x: dev_find_slot() returned: %s\n",
__func__, M.x86.R_AX, dev_path(dev));
@@ -427,7 +427,7 @@
switch (M.x86.R_AX) {
case 0xb108:
M.x86.R_CL =
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_read_config8(dev, offs);
#else
(u8) rtas_pci_config_read(bios_device.
@@ -442,7 +442,7 @@
break;
case 0xb109:
M.x86.R_CX =
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_read_config16(dev, offs);
#else
(u16) rtas_pci_config_read(bios_device.
@@ -457,7 +457,7 @@
break;
case 0xb10a:
M.x86.R_ECX =
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_read_config32(dev, offs);
#else
(u32) rtas_pci_config_read(bios_device.
@@ -495,7 +495,7 @@
} else {
switch (M.x86.R_AX) {
case 0xb10b:
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_write_config8(bios_device.dev, offs, M.x86.R_CL);
#else
rtas_pci_config_write(bios_device.puid, 1, bus,
@@ -507,7 +507,7 @@
M.x86.R_CL);
break;
case 0xb10c:
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_write_config16(bios_device.dev, offs, M.x86.R_CX);
#else
rtas_pci_config_write(bios_device.puid, 2, bus,
@@ -519,7 +519,7 @@
M.x86.R_CX);
break;
case 0xb10d:
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
pci_write_config32(bios_device.dev, offs, M.x86.R_ECX);
#else
rtas_pci_config_write(bios_device.puid, 4, bus,
diff --git a/src/device/oprom/yabel/io.c b/src/device/oprom/yabel/io.c
index b824acc..d673801 100644
--- a/src/device/oprom/yabel/io.c
+++ b/src/device/oprom/yabel/io.c
@@ -47,7 +47,7 @@
#include <arch/io.h>
-#if CONFIG_YABEL_DIRECTHW
+#if IS_ENABLED(CONFIG_YABEL_DIRECTHW)
u8 my_inb(X86EMU_pioAddr addr)
{
u8 val;
@@ -426,7 +426,7 @@
offs += (addr - 0xCFC); // if addr is not 0xcfc, the offset is moved accordingly
DEBUG_PRINTF_INTR("%s(): PCI Config Read from device: bus: %02x, devfn: %02x, offset: %02x\n",
__func__, bus, devfn, offs);
-#if CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES
+#if IS_ENABLED(CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES)
dev = dev_find_slot(bus, devfn);
DEBUG_PRINTF_INTR("%s(): dev_find_slot() returned: %s\n",
__func__, dev_path(dev));
@@ -446,7 +446,7 @@
HALT_SYS();
return 0;
} else {
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
switch (size) {
case 1:
rval = pci_read_config8(dev, offs);
@@ -495,11 +495,11 @@
printf
("Config write access invalid! PCI device %x:%x.%x, offs: %x\n",
bus, devfn >> 3, devfn & 7, offs);
-#if !CONFIG_YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG
+#if !IS_ENABLED(CONFIG_YABEL_PCI_FAKE_WRITING_OTHER_DEVICES_CONFIG)
HALT_SYS();
#endif
} else {
-#if CONFIG_PCI_OPTION_ROM_RUN_YABEL
+#if IS_ENABLED(CONFIG_PCI_OPTION_ROM_RUN_YABEL)
switch (size) {
case 1:
pci_write_config8(bios_device.dev, offs, val);
diff --git a/src/device/oprom/yabel/mem.c b/src/device/oprom/yabel/mem.c
index d4221f8..86d9982 100644
--- a/src/device/oprom/yabel/mem.c
+++ b/src/device/oprom/yabel/mem.c
@@ -41,10 +41,10 @@
#include "compat/time.h"
#include <device/resource.h>
-#if !CONFIG_YABEL_DIRECTHW || !CONFIG_YABEL_DIRECTHW
+#if !IS_ENABLED(CONFIG_YABEL_DIRECTHW) || !IS_ENABLED(CONFIG_YABEL_DIRECTHW)
// define a check for access to certain (virtual) memory regions (interrupt handlers, BIOS Data Area, ...)
-#if CONFIG_X86EMU_DEBUG
+#if IS_ENABLED(CONFIG_X86EMU_DEBUG)
static u8 in_check = 0; // to avoid recursion...
static inline void DEBUG_CHECK_VMEM_READ(u32 _addr, u32 _rval)
diff --git a/src/device/oprom/yabel/vbe.c b/src/device/oprom/yabel/vbe.c
index ec99901..876df23 100644
--- a/src/device/oprom/yabel/vbe.c
+++ b/src/device/oprom/yabel/vbe.c
@@ -34,7 +34,7 @@
#include <string.h>
#include <types.h>
-#if CONFIG_FRAMEBUFFER_SET_VESA_MODE
+#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
#include <boot/coreboot_tables.h>
#endif
@@ -66,7 +66,7 @@
u8 *biosmem;
u32 biosmem_size;
-#if CONFIG_FRAMEBUFFER_SET_VESA_MODE
+#if IS_ENABLED(CONFIG_FRAMEBUFFER_SET_VESA_MODE)
static inline u8
vbe_prepare(void)
{
@@ -734,7 +734,7 @@
vbe_get_mode_info(&mode_info);
vbe_set_mode(&mode_info);
-#if CONFIG_BOOTSPLASH
+#if IS_ENABLED(CONFIG_BOOTSPLASH)
unsigned char *framebuffer =
(unsigned char *) le32_to_cpu(mode_info.vesa.phys_base_ptr);
DEBUG_PRINTF_VBE("FRAMEBUFFER: 0x%p\n", framebuffer);
--
To view, visit https://review.coreboot.org/20337
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I82bf68a7ee54ff88f65aacc9eb0dbc30d013aae0
Gerrit-Change-Number: 20337
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth at google.com>
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