[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Use common opregion implementation

Patrick Rudolph (Code Review) gerrit at coreboot.org
Thu Jun 15 09:32:49 CEST 2017


Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20222


Change subject: soc/intel/skylake: Use common opregion implementation
......................................................................

soc/intel/skylake: Use common opregion implementation

Enable SOC_INTEL_COMMON_GFX_OPREGION and get rid of opregion.c.

Change-Id: I39190488e12917a09dbf7ee3947a33940ebc290b
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/Makefile.inc
D src/soc/intel/skylake/opregion.c
3 files changed, 1 insertion(+), 52 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/20222/1

diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 26f9021..44d9117 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -80,6 +80,7 @@
 	select UDELAY_TSC
 	select ACPI_NHLT
 	select HAVE_FSP_GOP
+	select SOC_INTEL_COMMON_GFX_OPREGION
 
 config MAINBOARD_USES_FSP2_0
 	bool
@@ -91,7 +92,6 @@
 	default y if MAINBOARD_USES_FSP2_0
 	select PLATFORM_USES_FSP2_0
 	select ADD_VBT_DATA_FILE if RUN_FSP_GOP
-	select SOC_INTEL_COMMON_GFX_OPREGION
 	select POSTCAR_CONSOLE
 	select POSTCAR_STAGE
 
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index 75d57a9..c72ab7c 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -56,7 +56,6 @@
 ramstage-y += lpc.c
 ramstage-y += me.c
 ramstage-y += memmap.c
-ramstage-$(CONFIG_PLATFORM_USES_FSP1_1) += opregion.c
 ramstage-y += pch.c
 ramstage-y += pei_data.c
 ramstage-y += pmc.c
diff --git a/src/soc/intel/skylake/opregion.c b/src/soc/intel/skylake/opregion.c
deleted file mode 100644
index ef7d4ab..0000000
--- a/src/soc/intel/skylake/opregion.c
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2016 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <soc/ramstage.h>
-#include <fsp/gop.h>
-#include <stdlib.h>
-#include <string.h>
-
-enum cb_err init_igd_opregion(igd_opregion_t *opregion)
-{
-	const optionrom_vbt_t *vbt;
-	uint32_t vbt_len;
-
-	memset(opregion, 0, sizeof(igd_opregion_t));
-
-	/* Read VBT table from flash */
-	vbt = fsp_get_vbt(&vbt_len);
-	if (!vbt)
-		die("vbt data not found");
-
-	memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE,
-		sizeof(IGD_OPREGION_SIGNATURE) - 1);
-	memcpy(opregion->header.vbios_version, vbt->coreblock_biosbuild,
-		sizeof(u32));
-	memcpy(opregion->vbt.gvd1, vbt, vbt->hdr_vbt_size <
-		sizeof(opregion->vbt.gvd1) ? vbt->hdr_vbt_size :
-		sizeof(opregion->vbt.gvd1));
-
-	/* Size, in KB, of the entire OpRegion structure (including header)*/
-	opregion->header.size = sizeof(igd_opregion_t) / KiB;
-	opregion->header.version = IGD_OPREGION_VERSION;
-
-	/* We just assume we're mobile for now */
-	opregion->header.mailboxes = MAILBOXES_MOBILE;
-
-	return CB_SUCCESS;
-}

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I39190488e12917a09dbf7ee3947a33940ebc290b
Gerrit-Change-Number: 20222
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>



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