[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Don't allow user to change CAR base and size

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/20180


Change subject: soc/intel/skylake: Don't allow user to change CAR base and size
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soc/intel/skylake: Don't allow user to change CAR base and size

Change-Id: Ic1656311ecc670dc0436995f0ec8199d270da4d1
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/soc/intel/skylake/Kconfig
1 file changed, 2 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/20180/1

diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 26f9021..fb2d94b 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -127,11 +127,11 @@
 	default 36
 
 config DCACHE_RAM_BASE
-	hex "Base address of cache-as-RAM"
+	hex
 	default 0xfef00000
 
 config DCACHE_RAM_SIZE
-	hex "Length in bytes of cache-as-RAM"
+	hex
 	default 0x40000
 	help
 	  The size of the cache-as-ram region required during bootblock

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic1656311ecc670dc0436995f0ec8199d270da4d1
Gerrit-Change-Number: 20180
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>