[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Removing some menuconfig options

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/20177


Change subject: soc/intel/apollolake: Removing some menuconfig options
......................................................................

soc/intel/apollolake: Removing some menuconfig options

Does not need to changeable in menuconfig.

Change-Id: Id488f7333952d10d10a62ac75298ec8008e6f9b4
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/soc/intel/apollolake/Kconfig
1 file changed, 3 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/20177/1

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index b80941d..deb510e 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -113,11 +113,11 @@
 	  This option allows you to select MMIO Base Address of sideband bus.
 
 config DCACHE_RAM_BASE
-	hex "Base address of cache-as-RAM"
+	hex
 	default 0xfef00000
 
 config DCACHE_RAM_SIZE
-	hex "Length in bytes of cache-as-RAM"
+	hex
 	default 0xc0000
 	help
 	  The size of the cache-as-ram region required during bootblock
@@ -140,7 +140,7 @@
 
 config CONSOLE_UART_BASE_ADDRESS
 	depends on CONSOLE_SERIAL
-	hex "MMIO base address for UART"
+	hex
 	default 0xde000000
 
 config SOC_UART_DEBUG

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id488f7333952d10d10a62ac75298ec8008e6f9b4
Gerrit-Change-Number: 20177
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>