[coreboot-gerrit] Change in coreboot[master]: siemens/mc_apl1: Enable decoding for COM 3 on LPC

Mario Scheithauer (Code Review) gerrit at coreboot.org
Mon Jun 12 14:53:56 CEST 2017


Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/20162


Change subject: siemens/mc_apl1: Enable decoding for COM 3 on LPC
......................................................................

siemens/mc_apl1: Enable decoding for COM 3 on LPC

Since this mainboard provides 3 COM ports on LPC, enable decoding of the
corresponding address range for COM 3.

Change-Id: I15c0748fce67eef46401c314f441aa45f5e3c5fa
Signed-off-by: Mario Scheithauer <mario.scheithauer at siemens.com>
---
M src/mainboard/siemens/mc_apl1/mainboard.c
1 file changed, 4 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/20162/1

diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c
index a15daa9..b765e71 100644
--- a/src/mainboard/siemens/mc_apl1/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/mainboard.c
@@ -17,6 +17,7 @@
 #include <device/pci.h>
 #include <device/device.h>
 #include <console/console.h>
+#include <soc/lpc.h>
 #include <soc/pci_devs.h>
 #include <string.h>
 #include <hwilib.h>
@@ -109,6 +110,9 @@
 
 	pads = brd_gpio_table(&num);
 	gpio_configure_pads(pads, num);
+
+	/* Enable additional I/O decoding ranges on LPC for COM 3 */
+	lpc_open_pmio_window(0x3e8, 8);
 }
 
 static void mainboard_final(void *chip_info)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I15c0748fce67eef46401c314f441aa45f5e3c5fa
Gerrit-Change-Number: 20162
Gerrit-PatchSet: 1
Gerrit-Owner: Mario Scheithauer <mario.scheithauer at siemens.com>



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