[coreboot-gerrit] Change in coreboot[master]: riscv: Fix bug bootmem_init

[Anonymous Coward (Code Review)]

Anonymous Coward #1001664 has uploaded this change for review. ( https://review.coreboot.org/20157


Change subject: riscv: Fix bug bootmem_init
......................................................................

riscv: Fix bug bootmem_init

There Because no bootmem_init was called, causing an error when loading payload.
Eerror Message:
    SELF Payload doesn't target RAM:
    Failed Segment: 0x90000000, 2429660 bytes
    Payload not loaded.

Change-Id: Ica434dca012cc258a3605eea08443f2fe0436416
Signed-off-by: wxjstz <wxjstz at 126.com>
---
M src/lib/selfboot.c
1 file changed, 2 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/20157/1

diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c
index ef1b986..0c90eac 100644
--- a/src/lib/selfboot.c
+++ b/src/lib/selfboot.c
@@ -518,6 +518,8 @@
 	struct segment head;
 	void *data;
 
+	bootmem_init();
+
 	data = rdev_mmap_full(prog_rdev(payload));
 
 	if (data == NULL)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ica434dca012cc258a3605eea08443f2fe0436416
Gerrit-Change-Number: 20157
Gerrit-PatchSet: 1
Gerrit-Owner: Anonymous Coward #1001664