[coreboot-gerrit] Change in coreboot[master]: cpu/x86/smm/smihandler: Cosmetic changes

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20146


Change subject: cpu/x86/smm/smihandler: Cosmetic changes
......................................................................

cpu/x86/smm/smihandler: Cosmetic changes

Use define for SSA base address.
Move EM64T area to 0x7c00 and add reserved area of size 0x100,
as there's no indication that the address 0x7d00 exists on any
platform.

No functional change.

Change-Id: I38c405c8977f5dd571e0da3a44fcad4738b696b2
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/cpu/x86/smm/smihandler.c
M src/include/cpu/x86/smm.h
2 files changed, 22 insertions(+), 9 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/20146/1

diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c
index 19e53e6..16415ba 100644
--- a/src/cpu/x86/smm/smihandler.c
+++ b/src/cpu/x86/smm/smihandler.c
@@ -153,12 +153,14 @@
 	case 0x00030007:
 		state_save.type = LEGACY;
 		state_save.legacy_state_save =
-			smm_save_state(smm_base, 0x7e00, node);
+			smm_save_state(smm_base,
+				       SMM_LEGACY_ARCH_OFFSET, node);
 		break;
 	case 0x00030100:
 		state_save.type = EM64T;
 		state_save.em64t_state_save =
-			smm_save_state(smm_base, 0x7d00, node);
+			smm_save_state(smm_base,
+				       SMM_EM64T_ARCH_OFFSET, node);
 		break;
 	case 0x00030101: /* SandyBridge, IvyBridge, and Haswell */
 		state_save.type = EM64T101;
@@ -169,7 +171,8 @@
 	case 0x00030064:
 		state_save.type = AMD64;
 		state_save.amd64_state_save =
-			smm_save_state(smm_base, 0x7e00, node);
+			smm_save_state(smm_base,
+				       SMM_AMD64_ARCH_OFFSET, node);
 		break;
 	default:
 		printk(BIOS_DEBUG, "smm_revision: 0x%08x\n", smm_revision);
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h
index 1892119..a88537b 100644
--- a/src/include/cpu/x86/smm.h
+++ b/src/include/cpu/x86/smm.h
@@ -32,6 +32,11 @@
 #define SMM_ENTRY_OFFSET 0x8000
 #define SMM_SAVE_STATE_BEGIN(x) (SMM_ENTRY_OFFSET + (x))
 
+/* AMD64 x86 SMM State-Save Area
+ * starts @ 0x7e00
+ */
+#define SMM_AMD64_ARCH_OFFSET 0x7e00
+
 typedef struct {
 	u16	es_selector;
 	u16	es_attributes;
@@ -128,16 +133,20 @@
 
 
 /* Intel Core 2 (EM64T) SMM State-Save Area
- * starts @ 0x7d00
+ * starts @ 0x7c00
  */
+#define SMM_EM64T_ARCH_OFFSET 0x7c00
+#define SMM_EM64T_SAVE_STATE_OFFSET \
+	SMM_SAVE_STATE_BEGIN(SMM_EM64T_ARCH_OFFSET)
 typedef struct {
-	u8	reserved0[208];
+	u8	reserved0[256];
+	u8	reserved1[208];
 
 	u32	gdtr_upper_base;
 	u32	ldtr_upper_base;
 	u32	idtr_upper_base;
 
-	u8	reserved1[4];
+	u8	reserved2[4];
 
 	u64	io_rdi;
 	u64	io_rip;
@@ -145,13 +154,13 @@
 	u64	io_rsi;
 	u64	cr4;
 
-	u8	reserved2[68];
+	u8	reserved3[68];
 
 	u64	gdtr_base;
 	u64	idtr_base;
 	u64	ldtr_base;
 
-	u8	reserved3[84];
+	u8	reserved4[84];
 
 	u32	smm_revision;
 	u32	smbase;
@@ -159,7 +168,7 @@
 	u16	io_restart;
 	u16	autohalt_restart;
 
-	u8	reserved4[24];
+	u8	reserved5[24];
 
 	u64	r15;
 	u64	r14;
@@ -394,6 +403,7 @@
 /* Legacy x86 SMM State-Save Area
  * starts @ 0x7e00
  */
+#define SMM_LEGACY_ARCH_OFFSET 0x7e00
 
 typedef struct {
 	u8	reserved0[248];

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I38c405c8977f5dd571e0da3a44fcad4738b696b2
Gerrit-Change-Number: 20146
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>