[coreboot-gerrit] Change in coreboot[master]: [WIP]mb/lenovo/x230: Use reference implementation
Patrick Rudolph (Code Review)
gerrit at coreboot.org
Thu Jun 8 12:45:19 CEST 2017
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20108
Change subject: [WIP]mb/lenovo/x230: Use reference implementation
......................................................................
[WIP]mb/lenovo/x230: Use reference implementation
Use Thinkpad 2012 reference design to remove duplicated code.
Change-Id: Ib99c4a5738495f74bf0d767676fbf4102e08a291
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/mainboard/lenovo/ref2012/Kconfig
M src/mainboard/lenovo/x230/Kconfig
D src/mainboard/lenovo/x230/Makefile.inc
D src/mainboard/lenovo/x230/acpi/ec.asl
D src/mainboard/lenovo/x230/acpi/platform.asl
D src/mainboard/lenovo/x230/acpi/superio.asl
D src/mainboard/lenovo/x230/acpi_tables.c
D src/mainboard/lenovo/x230/cmos.default
D src/mainboard/lenovo/x230/cmos.layout
D src/mainboard/lenovo/x230/dsdt.asl
D src/mainboard/lenovo/x230/gma-mainboard.ads
D src/mainboard/lenovo/x230/gpio.c
D src/mainboard/lenovo/x230/hda_verb.c
D src/mainboard/lenovo/x230/mainboard.c
D src/mainboard/lenovo/x230/romstage.c
D src/mainboard/lenovo/x230/smihandler.c
D src/mainboard/lenovo/x230/thermal.h
17 files changed, 5 insertions(+), 1,084 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/20108/1
diff --git a/src/mainboard/lenovo/ref2012/Kconfig b/src/mainboard/lenovo/ref2012/Kconfig
index c57da78..2a9170b 100644
--- a/src/mainboard/lenovo/ref2012/Kconfig
+++ b/src/mainboard/lenovo/ref2012/Kconfig
@@ -1,4 +1,4 @@
-if BOARD_LENOVO_XXX
+if BOARD_LENOVO_X230
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
index 480bb9a..4b791b4 100644
--- a/src/mainboard/lenovo/x230/Kconfig
+++ b/src/mainboard/lenovo/x230/Kconfig
@@ -1,61 +1,16 @@
if BOARD_LENOVO_X230
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select SYSTEM_TYPE_LAPTOP
- select CPU_INTEL_SOCKET_RPGA989
- select NORTHBRIDGE_INTEL_IVYBRIDGE
- select USE_NATIVE_RAMINIT
- select SOUTHBRIDGE_INTEL_C216
- select EC_LENOVO_PMH7
- select EC_LENOVO_H8
- select NO_UART_ON_SUPERIO
- select BOARD_ROMSIZE_KB_12288
- select HAVE_ACPI_TABLES
- select HAVE_OPTION_TABLE
- select HAVE_CMOS_DEFAULT
- select HAVE_ACPI_RESUME
- select INTEL_INT15
- select SANDYBRIDGE_IVYBRIDGE_LVDS
- select DRIVERS_RICOH_RCE822
- select MAINBOARD_HAS_LPC_TPM
- select MAINBOARD_HAS_LIBGFXINIT
- select GFX_GMA_INTERNAL_IS_LVDS
-
- # Workaround for EC/KBC IRQ1.
- select SERIRQ_CONTINUOUS_MODE
-
-config HAVE_IFD_BIN
- bool
- default n
-
-config HAVE_ME_BIN
- bool
- default n
+config DEVICETREE
+ string
+ default ../x230/devicetree.cb
config MAINBOARD_DIR
string
- default lenovo/x230
+ default lenovo/ref2012
config MAINBOARD_PART_NUMBER
string
default "ThinkPad X230"
-
-config MMCONF_BASE_ADDRESS
- hex
- default 0xf8000000
-
-config MAX_CPUS
- int
- default 8
-
-config USBDEBUG_HCD_INDEX
- int
- default 2
-
-config DRAM_RESET_GATE_GPIO
- int
- default 10
config VGA_BIOS_FILE
string
diff --git a/src/mainboard/lenovo/x230/Makefile.inc b/src/mainboard/lenovo/x230/Makefile.inc
deleted file mode 100644
index 2dab950..0000000
--- a/src/mainboard/lenovo/x230/Makefile.inc
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
-romstage-y += gpio.c
-
-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
diff --git a/src/mainboard/lenovo/x230/acpi/ec.asl b/src/mainboard/lenovo/x230/acpi/ec.asl
deleted file mode 100644
index d631f12..0000000
--- a/src/mainboard/lenovo/x230/acpi/ec.asl
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (c) 2011 Sven Schnelle <svens at stackframe.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <ec/lenovo/h8/acpi/ec.asl>
-
-Scope(\_SB.PCI0.LPCB.EC)
-{
-}
diff --git a/src/mainboard/lenovo/x230/acpi/platform.asl b/src/mainboard/lenovo/x230/acpi/platform.asl
deleted file mode 100644
index 9cd327a..0000000
--- a/src/mainboard/lenovo/x230/acpi/platform.asl
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011-2012 The Chromium OS Authors. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* The _PTS method (Prepare To Sleep) is called before the OS is
- * entering a sleep state. The sleep state number is passed in Arg0
- */
-
-Method(_PTS,1)
-{
- \_SB.PCI0.LPCB.EC.MUTE(1)
- \_SB.PCI0.LPCB.EC.USBP(0)
- \_SB.PCI0.LPCB.EC.RADI(0)
-}
-
-/* The _WAK method is called on system wakeup */
-
-Method(_WAK,1)
-{
- /* ME may not be up yet. */
- Store (0, \_TZ.MEB1)
- Store (0, \_TZ.MEB2)
-
- /* Not implemented. */
- Return(Package(){0,0})
-}
diff --git a/src/mainboard/lenovo/x230/acpi/superio.asl b/src/mainboard/lenovo/x230/acpi/superio.asl
deleted file mode 100644
index f2b35ba..0000000
--- a/src/mainboard/lenovo/x230/acpi/superio.asl
+++ /dev/null
@@ -1 +0,0 @@
-#include <drivers/pc80/pc/ps2_controller.asl>
diff --git a/src/mainboard/lenovo/x230/acpi_tables.c b/src/mainboard/lenovo/x230/acpi_tables.c
deleted file mode 100644
index c9e9407..0000000
--- a/src/mainboard/lenovo/x230/acpi_tables.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <types.h>
-#include <string.h>
-#include <cbmem.h>
-#include <console/console.h>
-#include <arch/acpi.h>
-#include <arch/ioapic.h>
-#include <arch/acpigen.h>
-#include <arch/smp/mpspec.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <southbridge/intel/bd82x6x/nvs.h>
-#include "thermal.h"
-
-static void acpi_update_thermal_table(global_nvs_t *gnvs)
-{
- gnvs->tcrt = CRITICAL_TEMPERATURE;
- gnvs->tpsv = PASSIVE_TEMPERATURE;
-}
-
-void acpi_create_gnvs(global_nvs_t *gnvs)
-{
- /* Disable USB ports in S3 by default */
- gnvs->s3u0 = 0;
- gnvs->s3u1 = 0;
-
- /* Disable USB ports in S5 by default */
- gnvs->s5u0 = 0;
- gnvs->s5u1 = 0;
-
- /* IGD Displays */
-
- // the lid is open by default.
- gnvs->lids = 1;
-
- acpi_update_thermal_table(gnvs);
-}
diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
deleted file mode 100644
index f7e38d2..0000000
--- a/src/mainboard/lenovo/x230/cmos.default
+++ /dev/null
@@ -1,16 +0,0 @@
-boot_option=Fallback
-baud_rate=115200
-debug_level=Spew
-power_on_after_fail=Disable
-nmi=Enable
-volume=0x3
-first_battery=Primary
-bluetooth=Enable
-wwan=Enable
-wlan=Enable
-touchpad=Enable
-sata_mode=AHCI
-fn_ctrl_swap=Disable
-sticky_fn=Disable
-trackpoint=Enable
-backlight=Both
diff --git a/src/mainboard/lenovo/x230/cmos.layout b/src/mainboard/lenovo/x230/cmos.layout
deleted file mode 100644
index 3766453..0000000
--- a/src/mainboard/lenovo/x230/cmos.layout
+++ /dev/null
@@ -1,141 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2007-2008 coresystems GmbH
-## Copyright (C) 2014 Vladimir Serbinenko
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-# -----------------------------------------------------------------
-entries
-
-# -----------------------------------------------------------------
-# Status Register A
-# -----------------------------------------------------------------
-# Status Register B
-# -----------------------------------------------------------------
-# Status Register C
-#96 4 r 0 status_c_rsvd
-#100 1 r 0 uf_flag
-#101 1 r 0 af_flag
-#102 1 r 0 pf_flag
-#103 1 r 0 irqf_flag
-# -----------------------------------------------------------------
-# Status Register D
-#104 7 r 0 status_d_rsvd
-#111 1 r 0 valid_cmos_ram
-# -----------------------------------------------------------------
-# Diagnostic Status Register
-#112 8 r 0 diag_rsvd1
-
-# -----------------------------------------------------------------
-0 120 r 0 reserved_memory
-#120 264 r 0 unused
-
-# -----------------------------------------------------------------
-# RTC_BOOT_BYTE (coreboot hardcoded)
-384 1 e 4 boot_option
-388 4 h 0 reboot_counter
-#390 2 r 0 unused?
-
-# -----------------------------------------------------------------
-# coreboot config options: console
-392 3 e 5 baud_rate
-395 4 e 6 debug_level
-#399 1 r 0 unused
-
-#400 8 r 0 reserved for century byte
-
-# coreboot config options: southbridge
-408 1 e 1 nmi
-409 2 e 7 power_on_after_fail
-
-# coreboot config options: EC
-411 1 e 8 first_battery
-412 1 e 1 bluetooth
-413 1 e 1 wwan
-414 1 e 1 touchpad
-415 1 e 1 wlan
-416 1 e 1 trackpoint
-417 1 e 1 fn_ctrl_swap
-418 1 e 1 sticky_fn
-#419 2 r 0 unused
-421 1 e 9 sata_mode
-422 2 e 10 backlight
-
-# coreboot config options: cpu
-#424 8 r 0 unused
-
-# coreboot config options: northbridge
-432 3 e 11 gfx_uma_size
-#435 5 r 0 unused
-
-440 8 h 0 volume
-
-# SandyBridge MRC Scrambler Seed values
-896 32 r 0 mrc_scrambler_seed
-928 32 r 0 mrc_scrambler_seed_s3
-960 16 r 0 mrc_scrambler_seed_chk
-
-# coreboot config options: check sums
-984 16 h 0 check_sum
-
-# -----------------------------------------------------------------
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-5 0 115200
-5 1 57600
-5 2 38400
-5 3 19200
-5 4 9600
-5 5 4800
-5 6 2400
-5 7 1200
-6 1 Emergency
-6 2 Alert
-6 3 Critical
-6 4 Error
-6 5 Warning
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Disable
-7 1 Enable
-7 2 Keep
-8 0 Secondary
-8 1 Primary
-9 0 AHCI
-9 1 Compatible
-10 0 Both
-10 1 Keyboard only
-10 2 Thinklight only
-10 3 None
-11 0 32M
-11 1 64M
-11 2 96M
-11 3 128M
-11 4 160M
-11 5 192M
-11 6 224M
-
-# -----------------------------------------------------------------
-checksums
-
-checksum 392 447 984
diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl
deleted file mode 100644
index 365fd0d..0000000
--- a/src/mainboard/lenovo/x230/dsdt.asl
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
- * Copyright (C) 2014 Vladimir Serbinenko
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
-#define EC_LENOVO_H8_ME_WORKAROUND 1
-
-DefinitionBlock(
- "dsdt.aml",
- "DSDT",
- 0x02, // DSDT revision: ACPI v2.0
- "COREv4", // OEM id
- "COREBOOT", // OEM table id
- 0x20110725 // OEM revision
-)
-{
- #include <southbridge/intel/bd82x6x/acpi/platform.asl>
-
- // Some generic macros
- #include "acpi/platform.asl"
-
- // global NVS and variables
- #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-
- #include <cpu/intel/model_206ax/acpi/cpu.asl>
-
- Scope (\_SB) {
- Device (PCI0)
- {
- #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
- #include <southbridge/intel/bd82x6x/acpi/pch.asl>
- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
-
- #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
- }
- }
-
- /* Chipset specific sleep states */
- #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
-}
diff --git a/src/mainboard/lenovo/x230/gma-mainboard.ads b/src/mainboard/lenovo/x230/gma-mainboard.ads
deleted file mode 100644
index 736dce7..0000000
--- a/src/mainboard/lenovo/x230/gma-mainboard.ads
+++ /dev/null
@@ -1,20 +0,0 @@
-with HW.GFX.GMA;
-with HW.GFX.GMA.Display_Probing;
-
-use HW.GFX.GMA;
-use HW.GFX.GMA.Display_Probing;
-
-private package GMA.Mainboard is
-
- ports : constant Port_List :=
- (DP1,
- DP2,
- DP3,
- HDMI1,
- HDMI2,
- HDMI3,
- Analog,
- Internal,
- others => Disabled);
-
-end GMA.Mainboard;
diff --git a/src/mainboard/lenovo/x230/gpio.c b/src/mainboard/lenovo/x230/gpio.c
deleted file mode 100644
index 92b1a97..0000000
--- a/src/mainboard/lenovo/x230/gpio.c
+++ /dev/null
@@ -1,302 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
- * Copyright (C) 2014 Vladimir Serbinenko
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef X230_GPIO_H
-#define X230_GPIO_H
-
-#include <southbridge/intel/common/gpio.h>
-
-const struct pch_gpio_set1 pch_gpio_set1_mode = {
- .gpio0 = GPIO_MODE_GPIO,
- .gpio1 = GPIO_MODE_GPIO,
- .gpio2 = GPIO_MODE_GPIO,
- .gpio3 = GPIO_MODE_GPIO,
- .gpio4 = GPIO_MODE_GPIO,
- .gpio5 = GPIO_MODE_GPIO,
- .gpio6 = GPIO_MODE_GPIO,
- .gpio7 = GPIO_MODE_GPIO,
- .gpio8 = GPIO_MODE_GPIO,
- .gpio9 = GPIO_MODE_NATIVE,
- .gpio10 = GPIO_MODE_GPIO,
- .gpio11 = GPIO_MODE_NATIVE,
- .gpio12 = GPIO_MODE_NATIVE,
- .gpio13 = GPIO_MODE_GPIO,
- .gpio14 = GPIO_MODE_NATIVE,
- .gpio15 = GPIO_MODE_GPIO,
- .gpio16 = GPIO_MODE_NATIVE,
- .gpio17 = GPIO_MODE_GPIO,
- .gpio18 = GPIO_MODE_NATIVE,
- .gpio19 = GPIO_MODE_NATIVE,
- .gpio20 = GPIO_MODE_NATIVE,
- .gpio21 = GPIO_MODE_GPIO,
- .gpio22 = GPIO_MODE_GPIO,
- .gpio23 = GPIO_MODE_NATIVE,
- .gpio24 = GPIO_MODE_GPIO,
- .gpio25 = GPIO_MODE_NATIVE,
- .gpio26 = GPIO_MODE_NATIVE,
- .gpio27 = GPIO_MODE_GPIO,
- .gpio28 = GPIO_MODE_GPIO,
- .gpio29 = GPIO_MODE_GPIO,
- .gpio30 = GPIO_MODE_NATIVE,
- .gpio31 = GPIO_MODE_NATIVE,
-};
-
-const struct pch_gpio_set1 pch_gpio_set1_direction = {
- .gpio0 = GPIO_DIR_INPUT,
- .gpio1 = GPIO_DIR_INPUT,
- .gpio2 = GPIO_DIR_INPUT,
- .gpio3 = GPIO_DIR_INPUT,
- .gpio4 = GPIO_DIR_INPUT,
- .gpio5 = GPIO_DIR_INPUT,
- .gpio6 = GPIO_DIR_INPUT,
- .gpio7 = GPIO_DIR_INPUT,
- .gpio8 = GPIO_DIR_OUTPUT,
- .gpio9 = GPIO_DIR_INPUT,
- .gpio10 = GPIO_DIR_OUTPUT,
- .gpio11 = GPIO_DIR_INPUT,
- .gpio12 = GPIO_DIR_OUTPUT,
- .gpio13 = GPIO_DIR_INPUT,
- .gpio14 = GPIO_DIR_INPUT,
- .gpio15 = GPIO_DIR_OUTPUT,
- .gpio16 = GPIO_DIR_INPUT,
- .gpio17 = GPIO_DIR_INPUT,
- .gpio18 = GPIO_DIR_INPUT,
- .gpio19 = GPIO_DIR_INPUT,
- .gpio20 = GPIO_DIR_INPUT,
- .gpio21 = GPIO_DIR_INPUT,
- .gpio22 = GPIO_DIR_OUTPUT,
- .gpio23 = GPIO_DIR_INPUT,
- .gpio24 = GPIO_DIR_OUTPUT,
- .gpio25 = GPIO_DIR_INPUT,
- .gpio26 = GPIO_DIR_INPUT,
- .gpio27 = GPIO_DIR_INPUT,
- .gpio28 = GPIO_DIR_OUTPUT,
- .gpio29 = GPIO_DIR_OUTPUT,
- .gpio30 = GPIO_DIR_OUTPUT,
- .gpio31 = GPIO_DIR_INPUT
-};
-
-const struct pch_gpio_set1 pch_gpio_set1_level = {
- .gpio0 = GPIO_LEVEL_HIGH,
- .gpio1 = GPIO_LEVEL_HIGH,
- .gpio2 = GPIO_LEVEL_LOW,
- .gpio3 = GPIO_LEVEL_HIGH,
- .gpio4 = GPIO_LEVEL_HIGH,
- .gpio5 = GPIO_LEVEL_HIGH,
- .gpio6 = GPIO_LEVEL_HIGH,
- .gpio7 = GPIO_LEVEL_HIGH,
- .gpio8 = GPIO_LEVEL_LOW,
- .gpio9 = GPIO_LEVEL_HIGH,
- .gpio10 = GPIO_LEVEL_HIGH,
- .gpio11 = GPIO_LEVEL_HIGH,
- .gpio12 = GPIO_LEVEL_HIGH,
- .gpio13 = GPIO_LEVEL_HIGH,
- .gpio14 = GPIO_LEVEL_HIGH,
- .gpio15 = GPIO_LEVEL_LOW,
- .gpio16 = GPIO_LEVEL_HIGH,
- .gpio17 = GPIO_LEVEL_HIGH,
- .gpio18 = GPIO_LEVEL_HIGH,
- .gpio19 = GPIO_LEVEL_HIGH,
- .gpio20 = GPIO_LEVEL_HIGH,
- .gpio21 = GPIO_LEVEL_HIGH,
- .gpio22 = GPIO_LEVEL_HIGH,
- .gpio23 = GPIO_LEVEL_HIGH,
- .gpio24 = GPIO_LEVEL_LOW,
- .gpio25 = GPIO_LEVEL_HIGH,
- .gpio26 = GPIO_LEVEL_HIGH,
- .gpio27 = GPIO_LEVEL_LOW,
- .gpio28 = GPIO_LEVEL_LOW,
- .gpio29 = GPIO_LEVEL_HIGH,
- .gpio30 = GPIO_LEVEL_HIGH,
- .gpio31 = GPIO_LEVEL_LOW,
-};
-
-const struct pch_gpio_set1 pch_gpio_set1_invert = {
- .gpio1 = GPIO_INVERT,
- .gpio6 = GPIO_INVERT,
- .gpio13 = GPIO_INVERT,
-};
-
-const struct pch_gpio_set2 pch_gpio_set2_mode = {
- .gpio32 = GPIO_MODE_NATIVE,
- .gpio33 = GPIO_MODE_GPIO,
- .gpio34 = GPIO_MODE_GPIO,
- .gpio35 = GPIO_MODE_GPIO,
- .gpio36 = GPIO_MODE_GPIO,
- .gpio37 = GPIO_MODE_GPIO,
- .gpio38 = GPIO_MODE_GPIO,
- .gpio39 = GPIO_MODE_GPIO,
- .gpio40 = GPIO_MODE_NATIVE,
- .gpio41 = GPIO_MODE_NATIVE,
- .gpio42 = GPIO_MODE_NATIVE,
- .gpio43 = GPIO_MODE_GPIO,
- .gpio44 = GPIO_MODE_NATIVE,
- .gpio45 = GPIO_MODE_NATIVE,
- .gpio46 = GPIO_MODE_NATIVE,
- .gpio47 = GPIO_MODE_NATIVE,
- .gpio48 = GPIO_MODE_GPIO,
- .gpio49 = GPIO_MODE_GPIO,
- .gpio50 = GPIO_MODE_GPIO,
- .gpio51 = GPIO_MODE_GPIO,
- .gpio52 = GPIO_MODE_GPIO,
- .gpio53 = GPIO_MODE_GPIO,
- .gpio54 = GPIO_MODE_GPIO,
- .gpio55 = GPIO_MODE_GPIO,
- .gpio56 = GPIO_MODE_NATIVE,
- .gpio57 = GPIO_MODE_GPIO,
- .gpio58 = GPIO_MODE_NATIVE,
- .gpio59 = GPIO_MODE_NATIVE,
- .gpio60 = GPIO_MODE_NATIVE,
- .gpio61 = GPIO_MODE_NATIVE,
- .gpio62 = GPIO_MODE_NATIVE,
- .gpio63 = GPIO_MODE_NATIVE,
-};
-
-const struct pch_gpio_set2 pch_gpio_set2_direction = {
- .gpio32 = GPIO_DIR_INPUT,
- .gpio33 = GPIO_DIR_INPUT,
- .gpio34 = GPIO_DIR_OUTPUT,
- .gpio35 = GPIO_DIR_INPUT,
- .gpio36 = GPIO_DIR_INPUT,
- .gpio37 = GPIO_DIR_INPUT,
- .gpio38 = GPIO_DIR_INPUT,
- .gpio39 = GPIO_DIR_INPUT,
- .gpio40 = GPIO_DIR_INPUT,
- .gpio41 = GPIO_DIR_INPUT,
- .gpio42 = GPIO_DIR_INPUT,
- .gpio43 = GPIO_DIR_OUTPUT,
- .gpio44 = GPIO_DIR_INPUT,
- .gpio45 = GPIO_DIR_INPUT,
- .gpio46 = GPIO_DIR_INPUT,
- .gpio47 = GPIO_DIR_INPUT,
- .gpio48 = GPIO_DIR_INPUT,
- .gpio49 = GPIO_DIR_INPUT,
- .gpio50 = GPIO_DIR_INPUT,
- .gpio51 = GPIO_DIR_OUTPUT,
- .gpio52 = GPIO_DIR_OUTPUT,
- .gpio53 = GPIO_DIR_OUTPUT,
- .gpio54 = GPIO_DIR_INPUT,
- .gpio55 = GPIO_DIR_OUTPUT,
- .gpio56 = GPIO_DIR_INPUT,
- .gpio57 = GPIO_DIR_INPUT,
- .gpio58 = GPIO_DIR_INPUT,
- .gpio59 = GPIO_DIR_INPUT,
- .gpio60 = GPIO_DIR_INPUT,
- .gpio61 = GPIO_DIR_OUTPUT,
- .gpio62 = GPIO_DIR_OUTPUT,
- .gpio63 = GPIO_DIR_OUTPUT,
-};
-
-const struct pch_gpio_set2 pch_gpio_set2_level = {
- .gpio32 = GPIO_LEVEL_HIGH,
- .gpio33 = GPIO_LEVEL_HIGH,
- .gpio34 = GPIO_LEVEL_LOW,
- .gpio35 = GPIO_LEVEL_LOW,
- .gpio36 = GPIO_LEVEL_LOW,
- .gpio37 = GPIO_LEVEL_LOW,
- .gpio38 = GPIO_LEVEL_HIGH,
- .gpio39 = GPIO_LEVEL_LOW,
- .gpio40 = GPIO_LEVEL_HIGH,
- .gpio41 = GPIO_LEVEL_HIGH,
- .gpio42 = GPIO_LEVEL_HIGH,
- .gpio43 = GPIO_LEVEL_HIGH,
- .gpio44 = GPIO_LEVEL_HIGH,
- .gpio45 = GPIO_LEVEL_HIGH,
- .gpio46 = GPIO_LEVEL_HIGH,
- .gpio47 = GPIO_LEVEL_HIGH,
- .gpio48 = GPIO_LEVEL_HIGH,
- .gpio49 = GPIO_LEVEL_HIGH,
- .gpio50 = GPIO_LEVEL_HIGH,
- .gpio51 = GPIO_LEVEL_HIGH,
- .gpio52 = GPIO_LEVEL_HIGH,
- .gpio53 = GPIO_LEVEL_HIGH,
- .gpio54 = GPIO_LEVEL_HIGH,
- .gpio55 = GPIO_LEVEL_HIGH,
- .gpio56 = GPIO_LEVEL_HIGH,
- .gpio57 = GPIO_LEVEL_HIGH,
- .gpio58 = GPIO_LEVEL_HIGH,
- .gpio59 = GPIO_LEVEL_HIGH,
- .gpio60 = GPIO_LEVEL_HIGH,
- .gpio61 = GPIO_LEVEL_HIGH,
- .gpio62 = GPIO_LEVEL_LOW,
- .gpio63 = GPIO_LEVEL_HIGH,
-};
-
-const struct pch_gpio_set3 pch_gpio_set3_mode = {
- .gpio64 = GPIO_MODE_GPIO,
- .gpio65 = GPIO_MODE_GPIO,
- .gpio66 = GPIO_MODE_GPIO,
- .gpio67 = GPIO_MODE_GPIO,
- .gpio68 = GPIO_MODE_GPIO,
- .gpio69 = GPIO_MODE_GPIO,
- .gpio70 = GPIO_MODE_GPIO,
- .gpio71 = GPIO_MODE_GPIO,
- .gpio72 = GPIO_MODE_NATIVE,
- .gpio73 = GPIO_MODE_NATIVE,
- .gpio74 = GPIO_MODE_NATIVE,
- .gpio75 = GPIO_MODE_NATIVE,
-};
-
-const struct pch_gpio_set3 pch_gpio_set3_direction = {
- .gpio64 = GPIO_DIR_INPUT,
- .gpio65 = GPIO_DIR_INPUT,
- .gpio66 = GPIO_DIR_INPUT,
- .gpio67 = GPIO_DIR_INPUT,
- .gpio68 = GPIO_DIR_INPUT,
- .gpio69 = GPIO_DIR_INPUT,
- .gpio70 = GPIO_DIR_INPUT,
- .gpio71 = GPIO_DIR_INPUT,
- .gpio72 = GPIO_DIR_INPUT,
- .gpio73 = GPIO_DIR_INPUT,
- .gpio74 = GPIO_DIR_INPUT,
- .gpio75 = GPIO_DIR_INPUT,
-};
-
-const struct pch_gpio_set3 pch_gpio_set3_level = {
- .gpio64 = GPIO_LEVEL_HIGH,
- .gpio65 = GPIO_LEVEL_HIGH,
- .gpio66 = GPIO_LEVEL_HIGH,
- .gpio67 = GPIO_LEVEL_HIGH,
- .gpio68 = GPIO_LEVEL_LOW,
- .gpio69 = GPIO_LEVEL_LOW,
- .gpio70 = GPIO_LEVEL_HIGH,
- .gpio71 = GPIO_LEVEL_HIGH,
- .gpio72 = GPIO_LEVEL_HIGH,
- .gpio73 = GPIO_LEVEL_HIGH,
- .gpio74 = GPIO_LEVEL_HIGH,
- .gpio75 = GPIO_LEVEL_HIGH,
-};
-
-const struct pch_gpio_map mainboard_gpio_map = {
- .set1 = {
- .mode = &pch_gpio_set1_mode,
- .direction = &pch_gpio_set1_direction,
- .level = &pch_gpio_set1_level,
- .invert = &pch_gpio_set1_invert,
-
- },
- .set2 = {
- .mode = &pch_gpio_set2_mode,
- .direction = &pch_gpio_set2_direction,
- .level = &pch_gpio_set2_level,
- },
- .set3 = {
- .mode = &pch_gpio_set3_mode,
- .direction = &pch_gpio_set3_direction,
- .level = &pch_gpio_set3_level,
- },
-};
-#endif
diff --git a/src/mainboard/lenovo/x230/hda_verb.c b/src/mainboard/lenovo/x230/hda_verb.c
deleted file mode 100644
index 792579a..0000000
--- a/src/mainboard/lenovo/x230/hda_verb.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
- * Copyright (C) 2014 Vladimir Serbinenko
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* Vendor Name : IDT
- * Vendor ID : 0x10ec0269
- * Subsystem ID : 0x17aa21fa
- * Revision ID : 0x100303
- */
-
-
-#include <device/azalia_device.h>
-
-const u32 cim_verb_data[] = {
- /* coreboot specific header */
- 0x10ec0269, // Codec Vendor / Device ID: Realtek ALC269VC
- 0x17aa21fa, // Subsystem ID
- 0x00000013, // Number of 4 dword sets
-
-/* Bits 31:28 - Codec Address */
-/* Bits 27:20 - NID */
-/* Bits 19:8 - Verb ID */
-/* Bits 7:0 - Payload */
-
-/* NID 0x01 - NodeInfo */
- AZALIA_SUBVENDOR(0x0, 0x17AA21FA),
-
-/* NID 0x0A - External Microphone Connector
- * Config=0x04A11020 (External,Right; MicIn,3.5mm; Black,JD; DA,Seq)
- */
- AZALIA_PIN_CFG(0x0, 0x0A, 0x04A11020),
-
-/* NID 0x0B - Headphone Connector
- * Config=0x0421101F (External,Right; HP,3.5mm; Black,JD; DA,Seq)
- */
- AZALIA_PIN_CFG(0x0, 0x0B, 0x0421101F),
-
-/* NID 0x0C - Not connected
- * Config=0x40F000F0 (N/A,N/A; Other,Unknown; Unknown,JD; DA,Seq)
- */
- AZALIA_PIN_CFG(0x0, 0x0C, 0x40F000F0),
-
-/* NID 0x0D - Internal Speakers
- * Config=0x90170110 (Fixed,Int; Speaker,Other Analog; Unknown,nJD; DA,Seq)
- */
- AZALIA_PIN_CFG(0x0, 0x0D, 0x90170110),
-
-/* NID 0x0F - Not connected
- * Config=0x40F000F0
- */
- AZALIA_PIN_CFG(0x0, 0x0F, 0x40F000F0),
-
-/* NID 0x11 - Internal Microphone
- * Config=0xD5A30140 (Fixed internal,Top; Mic In,ATIPI; Unknown,nJD; DA,Seq)
- */
- AZALIA_PIN_CFG(0x0, 0x11, 0xD5A30140),
- AZALIA_PIN_CFG(0x0, 0x12, 0x90A60140),
- AZALIA_PIN_CFG(0x0, 0x14, 0x90170110),
- AZALIA_PIN_CFG(0x0, 0x15, 0x03211020),
- AZALIA_PIN_CFG(0x0, 0x18, 0x03A11830),
- AZALIA_PIN_CFG(0x0, 0x19, 0x411111F0),
-
- AZALIA_PIN_CFG(0x0, 0x1A, 0x411111F0),
- AZALIA_PIN_CFG(0x0, 0x1D, 0x40138205),
- AZALIA_PIN_CFG(0x0, 0x1E, 0x411111F0),
-
- /* Misc entries */
- 0x01970804,
- 0x01870803,
- 0x01470740,
- 0x00970640,
-
- 0x00370680,
- 0x00270680,
- 0x01470C02,
- 0x01570C02,
-
- /* ALC coefficients. */
-
- /* 08 */
- 0x02050008,
- 0x02040700,
- /* 18 */
- 0x02050018,
- 0x02045184,
- /* 1c */
- 0x0205001c,
- 0x02042800,
-
- 0x01870724, /* Enable Vrefout for mic */
- 0x00170500, /* Set power state to D0 */
-
- /* --- Next Codec --- */
-
-/* Vendor Name : Intel
- * Vendor ID : 0x80862806
- * Subsystem ID : 0x80860101
- * Revision ID : 0x100000
- */
- /* coreboot specific header */
- 0x80862806, // Codec Vendor / Device ID: Intel PantherPoint HDMI
- 0x80860101, // Subsystem ID
- 0x00000004, // Number of IDs
-
- /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
- AZALIA_SUBVENDOR(0x3, 0x80860101),
-
- /* Pin Complex (NID 0x05) Digital Out at Int HDMI */
- AZALIA_PIN_CFG(0x3, 0x05, 0x18560010),
-
- /* Pin Complex (NID 0x06) Digital Out at Int HDMI */
- AZALIA_PIN_CFG(0x3, 0x06, 0x18560020),
-
- /* Pin Complex (NID 0x07) Digital Out at Int HDMI */
- AZALIA_PIN_CFG(0x3, 0x07, 0x18560030)
-};
-
-const u32 pc_beep_verbs[] = {
- 0x02177a00, /* Digital PCBEEP Gain: 0h=-9db, 1h=-6db ... 4h=+3db, 5h=+6db */
-};
-
-AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/lenovo/x230/mainboard.c b/src/mainboard/lenovo/x230/mainboard.c
deleted file mode 100644
index 0114e9b..0000000
--- a/src/mainboard/lenovo/x230/mainboard.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2011-2012 Google Inc.
- * Copyright (C) 2014 Vladimir Serbinenko
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <drivers/intel/gma/int15.h>
-#include <ec/lenovo/h8/h8.h>
-
-// mainboard_enable is executed as first thing after
-// enumerate_buses().
-
-static void mainboard_enable(device_t dev)
-{
- install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
- GMA_INT15_PANEL_FIT_DEFAULT,
- GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-}
-
-void h8_mainboard_init_dock (void)
-{
-}
-
-struct chip_operations mainboard_ops = {
- .enable_dev = mainboard_enable,
-};
diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c
deleted file mode 100644
index 4d8f330..0000000
--- a/src/mainboard/lenovo/x230/romstage.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2010 coresystems GmbH
- * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
- * Copyright (C) 2014 Vladimir Serbinenko
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <lib.h>
-#include <timestamp.h>
-#include <arch/byteorder.h>
-#include <arch/io.h>
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
-#include <arch/acpi.h>
-#include <cbmem.h>
-#include <console/console.h>
-#include <northbridge/intel/sandybridge/sandybridge.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
-#include <cpu/x86/msr.h>
-#include <cbfs.h>
-
-void pch_enable_lpc(void)
-{
- /* X230 EC Decode Range Port60/64, Port62/66 */
- /* Enable EC, PS/2 Keyboard/Mouse */
- pci_write_config16(PCH_LPC_DEV, LPC_EN,
- CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);
-
- pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x7c1601);
- pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0xc15e1);
- pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, 0x0c06a1);
-
- pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000);
-}
-
-void rcba_config(void)
-{
- /* Disable unused devices (board specific) */
- RCBA32(FD) = 0x17f81fe3;
- RCBA32(BUC) = 0;
-}
-
-const struct southbridge_usb_port mainboard_usb_ports[] = {
- { 1, 0, 0 }, /* P0 (left, fan side), OC 0 */
- { 1, 0, 1 }, /* P1 (left touchpad side), OC 1 */
- { 1, 1, 3 }, /* P2: dock, OC 3 */
- { 1, 1, -1 }, /* P3: wwan, no OC */
- { 1, 1, -1 }, /* P4: Wacom tablet on X230t, otherwise empty */
- { 1, 1, -1 }, /* P5: Expresscard, no OC */
- { 0, 0, -1 }, /* P6: Empty */
- { 1, 2, -1 }, /* P7: dock, no OC */
- { 1, 0, -1 },
- { 1, 2, 5 }, /* P9: Right (EHCI debug), OC 5 */
- { 1, 1, -1 }, /* P10: fingerprint reader, no OC */
- { 1, 1, -1 }, /* P11: bluetooth, no OC. */
- { 1, 1, -1 }, /* P12: wlan, no OC */
- { 1, 1, -1 }, /* P13: webcam, no OC */
-};
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only) {
- read_spd (&spd[0], 0x50, id_only);
- read_spd (&spd[2], 0x51, id_only);
-}
-
-void mainboard_early_init(int s3resume) {
-}
-
-void mainboard_config_superio(void)
-{
-}
diff --git a/src/mainboard/lenovo/x230/smihandler.c b/src/mainboard/lenovo/x230/smihandler.c
deleted file mode 100644
index 09dcbf2..0000000
--- a/src/mainboard/lenovo/x230/smihandler.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008-2009 coresystems GmbH
- * Copyright (C) 2014 Vladimir Serbinenko
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <console/console.h>
-#include <cpu/x86/smm.h>
-#include <ec/acpi/ec.h>
-#include <ec/lenovo/h8/h8.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-
-#define GPE_EC_SCI 1
-#define GPE_EC_WAKE 13
-
-static void mainboard_smi_handle_ec_sci(void)
-{
- u8 status = inb(EC_SC);
- u8 event;
-
- if (!(status & EC_SCI_EVT))
- return;
-
- event = ec_query();
- printk(BIOS_DEBUG, "EC event %02x\n", event);
-}
-
-void mainboard_smi_gpi(u32 gpi_sts)
-{
- if (gpi_sts & (1 << GPE_EC_SCI))
- mainboard_smi_handle_ec_sci();
-}
-
-int mainboard_smi_apmc(u8 data)
-{
- switch (data) {
- case APM_CNT_ACPI_ENABLE:
- /* use 0x1600/0x1604 to prevent races with userspace */
- ec_set_ports(0x1604, 0x1600);
- /* route EC_SCI to SCI */
- gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
- /* discard all events, and enable attention */
- ec_write(0x80, 0x01);
- break;
- case APM_CNT_ACPI_DISABLE:
- /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
- provide a EC query function */
- ec_set_ports(0x66, 0x62);
- /* route EC_SCI to SMI */
- gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
- /* discard all events, and enable attention */
- ec_write(0x80, 0x01);
- break;
- default:
- break;
- }
- return 0;
-}
-
-void mainboard_smi_sleep(u8 slp_typ)
-{
- if (slp_typ == 3) {
- u8 ec_wake = ec_read(0x32);
- /* If EC wake events are enabled, enable wake on EC WAKE GPE. */
- if (ec_wake & 0x14) {
- /* Redirect EC WAKE GPE to SCI. */
- gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
- }
- }
-}
diff --git a/src/mainboard/lenovo/x230/thermal.h b/src/mainboard/lenovo/x230/thermal.h
deleted file mode 100644
index 199c27e..0000000
--- a/src/mainboard/lenovo/x230/thermal.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
- * Copyright (C) 2014 Vladimir Serbinenko
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef X230_THERMAL_H
-#define X230_THERMAL_H
-
- /* Temperature which OS will shutdown at */
- #define CRITICAL_TEMPERATURE 100
-
- /* Temperature which OS will throttle CPU */
- #define PASSIVE_TEMPERATURE 90
-
-#endif
--
To view, visit https://review.coreboot.org/20108
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib99c4a5738495f74bf0d767676fbf4102e08a291
Gerrit-Change-Number: 20108
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
More information about the coreboot-gerrit
mailing list