[coreboot-gerrit] Change in coreboot[master]: sb/intel/bd82x6x: Fill in acpi_name

Patrick Rudolph (Code Review) gerrit at coreboot.org
Wed Jun 7 09:56:17 CEST 2017


Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20086


Change subject: sb/intel/bd82x6x: Fill in acpi_name
......................................................................

sb/intel/bd82x6x: Fill in acpi_name

Fill in acpi_name to return proper ACPI names.
To be used with ssdt generators.

Change-Id: I08611b11c694ee5034bca11cb321915d5c73c2f6
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/southbridge/intel/bd82x6x/azalia.c
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/bd82x6x/pcie.c
M src/southbridge/intel/bd82x6x/sata.c
M src/southbridge/intel/bd82x6x/smbus.c
M src/southbridge/intel/bd82x6x/usb_ehci.c
M src/southbridge/intel/bd82x6x/usb_xhci.c
7 files changed, 66 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/20086/1

diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c
index c122d2a..0e974ba 100644
--- a/src/southbridge/intel/bd82x6x/azalia.c
+++ b/src/southbridge/intel/bd82x6x/azalia.c
@@ -331,6 +331,11 @@
 	pci_write_config8(dev, 0x43, reg8);
 }
 
+static const char *azalia_acpi_name(device_t dev)
+{
+	return "HDEF";
+}
+
 static void azalia_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 	if (!vendor || !device) {
@@ -353,6 +358,7 @@
 	.init			= azalia_init,
 	.scan_bus		= 0,
 	.ops_pci		= &azalia_pci_ops,
+	.acpi_name		= azalia_acpi_name,
 };
 
 static const unsigned short pci_device_ids[] = { 0x1c20, 0x1e20, 0 };
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index c9fee89..209c8ed 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -814,6 +814,11 @@
 	fadt->x_gpe1_blk.addrh = 0x0;
 }
 
+static const char *lpc_acpi_name(device_t dev)
+{
+	return "LPCB";
+}
+
 static void southbridge_fill_ssdt(device_t device)
 {
 	device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
@@ -841,6 +846,7 @@
 	.write_acpi_tables      = acpi_write_hpet,
 	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
 	.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
+	.acpi_name		= lpc_acpi_name,
 	.init			= lpc_init,
 	.final			= lpc_final,
 	.enable			= pch_lpc_enable,
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 627b6f7..07f8138 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -297,6 +297,29 @@
 	pch_pcie_pm_late(dev);
 }
 
+static const char *pch_pcie_acpi_name(device_t dev)
+{
+	switch (dev->path.pci.devfn) {
+	case PCI_DEVFN(0x1c, 0):
+		return "RP01";
+	case PCI_DEVFN(0x1c, 1):
+		return "RP02";
+	case PCI_DEVFN(0x1c, 2):
+		return "RP03";
+	case PCI_DEVFN(0x1c, 3):
+		return "RP04";
+	case PCI_DEVFN(0x1c, 4):
+		return "RP05";
+	case PCI_DEVFN(0x1c, 5):
+		return "RP06";
+	case PCI_DEVFN(0x1c, 6):
+		return "RP07";
+	case PCI_DEVFN(0x1c, 7):
+		return "RP08";
+	}
+	return NULL;
+}
+
 static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 	/* NOTE: This is not the default position! */
@@ -321,6 +344,7 @@
 	.disable		= pch_pcie_disable,
 	.enable			= pch_pcie_enable,
 	.scan_bus		= pch_pciexp_scan_bridge,
+	.acpi_name		= pch_pcie_acpi_name,
 	.ops_pci		= &pci_ops,
 };
 
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index d217a04..ac4945d 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -244,6 +244,11 @@
 	}
 }
 
+static const char *sata_acpi_name(device_t dev)
+{
+	return "SATA";
+}
+
 static void sata_fill_ssdt(device_t dev)
 {
 	config_t *config = dev->chip_info;
@@ -264,6 +269,7 @@
 	.enable			= sata_enable,
 	.scan_bus		= 0,
 	.ops_pci		= &sata_pci_ops,
+	.acpi_name		= sata_acpi_name,
 };
 
 static const unsigned short pci_device_ids[] = { 0x1c00, 0x1c01, 0x1c02, 0x1c03,
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 5778e25..c450d9b 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -143,6 +143,11 @@
 	res = pci_get_resource(dev, PCI_BASE_ADDRESS_0);
 }
 
+static const char *smbus_acpi_name(device_t dev)
+{
+	return "SBUS";
+}
+
 static struct device_operations smbus_ops = {
 	.read_resources		= smbus_read_resources,
 	.set_resources		= pci_dev_set_resources,
@@ -151,6 +156,7 @@
 	.init			= pch_smbus_init,
 	.ops_smbus_bus		= &lops_smbus_bus,
 	.ops_pci		= &smbus_pci_ops,
+	.acpi_name		= smbus_acpi_name,
 };
 
 static const unsigned short pci_device_ids[] = { 0x1c22, 0x1e22, 0 };
diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index 2712a5b..42d7a83 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -94,6 +94,17 @@
 	pci_write_config8(dev, 0x80, access_cntl);
 }
 
+static const char *usb_ehci_acpi_name(device_t dev)
+{
+	switch (dev->path.pci.devfn) {
+	case PCI_DEVFN(0x1a, 0):
+		return "EHC2";
+	case PCI_DEVFN(0x1d, 0):
+		return "EHC1";
+	}
+	return NULL;
+}
+
 static struct pci_operations lops_pci = {
 	.set_subsystem	= &usb_ehci_set_subsystem,
 };
@@ -105,6 +116,7 @@
 	.init			= usb_ehci_init,
 	.scan_bus		= 0,
 	.ops_pci		= &lops_pci,
+	.acpi_name		= usb_ehci_acpi_name,
 };
 
 static const unsigned short pci_device_ids[] = { 0x1c26, 0x1c2d, 0x1e26, 0x1e2d,
diff --git a/src/southbridge/intel/bd82x6x/usb_xhci.c b/src/southbridge/intel/bd82x6x/usb_xhci.c
index 74deb52..1aeb864 100644
--- a/src/southbridge/intel/bd82x6x/usb_xhci.c
+++ b/src/southbridge/intel/bd82x6x/usb_xhci.c
@@ -51,6 +51,11 @@
 	printk(BIOS_DEBUG, "done.\n");
 }
 
+static const char *xhci_acpi_name(device_t dev)
+{
+	return "XHC";
+}
+
 static void xhci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 {
 	if (!vendor || !device) {
@@ -73,6 +78,7 @@
 	.init			= usb_xhci_init,
 	.scan_bus		= 0,
 	.ops_pci		= &xhci_pci_ops,
+	.acpi_name		= xhci_acpi_name,
 };
 
 static const unsigned short pci_device_ids[] = { 0x1e31, 0 };

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I08611b11c694ee5034bca11cb321915d5c73c2f6
Gerrit-Change-Number: 20086
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>



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