[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Fill in acpi_name
Patrick Rudolph (Code Review)
gerrit at coreboot.org
Wed Jun 7 09:56:17 CEST 2017
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20085
Change subject: nb/intel/sandybridge: Fill in acpi_name
......................................................................
nb/intel/sandybridge: Fill in acpi_name
Fill in acpi_name to return proper ACPI names.
To be used with ssdt generators.
Change-Id: I19526e334a9c5435fdb19419a671b86c5f6b2be9
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/northbridge/intel/sandybridge/gma.c
M src/northbridge/intel/sandybridge/northbridge.c
2 files changed, 23 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/20085/1
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index 868a961..c74a2b7 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -675,6 +675,11 @@
return current;
}
+static const char *gma_acpi_name(device_t dev)
+{
+ return "GFX0";
+}
+
/* called by pci set_vga_bridge function */
static void gma_func0_disable(struct device *dev)
{
@@ -702,6 +707,7 @@
.enable = 0,
.disable = gma_func0_disable,
.ops_pci = &gma_pci_ops,
+ .acpi_name = gma_acpi_name,
.write_acpi_tables = gma_write_acpi_tables,
};
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 5c5f41a..a8826d2 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -242,6 +242,21 @@
assign_resources(dev->link_list);
}
+static const char *northbridge_acpi_name(struct device *dev)
+{
+ if (dev->path.type == DEVICE_PATH_DOMAIN)
+ return "PCI0";
+
+ if (dev->path.type != DEVICE_PATH_PCI)
+ return NULL;
+
+ switch (dev->path.pci.devfn) {
+ case PCI_DEVFN(0, 0): return "MCHC";
+ }
+
+ return NULL;
+}
+
/* TODO We could determine how many PCIe busses we need in
* the bar. For now that number is hardcoded to a max of 64.
* See e7525/northbridge.c for an example.
@@ -252,8 +267,9 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
+ .ops_pci_bus = pci_bus_default_ops,
.write_acpi_tables = northbridge_write_acpi_tables,
+ .acpi_name = northbridge_acpi_name,
};
static void mc_read_resources(device_t dev)
--
To view, visit https://review.coreboot.org/20085
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I19526e334a9c5435fdb19419a671b86c5f6b2be9
Gerrit-Change-Number: 20085
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
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