[coreboot-gerrit] Change in coreboot[master]: mainboard/intel/cannonlake_rvp: Initial set of board files

[Andrey Petrov (Code Review)]

Andrey Petrov has uploaded this change for review. ( https://review.coreboot.org/20075


Change subject: mainboard/intel/cannonlake_rvp: Initial set of board files
......................................................................

mainboard/intel/cannonlake_rvp: Initial set of board files

Change-Id: I82bd5c785e451f02b827765c54d432517afd7de0
Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
A src/mainboard/intel/cannonlake_rvp/Kconfig
A src/mainboard/intel/cannonlake_rvp/Kconfig.name
A src/mainboard/intel/cannonlake_rvp/Makefile.inc
A src/mainboard/intel/cannonlake_rvp/devicetree.cb
A src/mainboard/intel/cannonlake_rvp/romstage.c
5 files changed, 63 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/20075/1

diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig
new file mode 100644
index 0000000..b2223b0
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/Kconfig
@@ -0,0 +1,30 @@
+if BOARD_INTEL_CANNONLAKE_RVP
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+	select BOARD_ROMSIZE_KB_16384
+	select SOC_INTEL_CANNONLAKE
+
+config MAINBOARD_DIR
+	string
+	default "intel/cannonlake_rvp"
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "Cannonlake RVP"
+
+config MAINBOARD_VENDOR
+	string
+	default "Intel"
+
+config IFD_BIN_PATH
+	string
+	depends on HAVE_IFD_BIN
+	default "3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR)/descriptor.bin"
+
+config ME_BIN_PATH
+	string
+	depends on HAVE_ME_BIN
+	default "3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR)/me.bin"
+
+endif
diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig.name b/src/mainboard/intel/cannonlake_rvp/Kconfig.name
new file mode 100644
index 0000000..4935603
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/Kconfig.name
@@ -0,0 +1,2 @@
+config BOARD_INTEL_CANNONLAKE_RVP
+	bool "Cannonlake DDR4 RVP"
diff --git a/src/mainboard/intel/cannonlake_rvp/Makefile.inc b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
new file mode 100644
index 0000000..75c34dd
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/Makefile.inc
@@ -0,0 +1 @@
+#Nothing here yet
diff --git a/src/mainboard/intel/cannonlake_rvp/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/devicetree.cb
new file mode 100644
index 0000000..c7001a4
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/devicetree.cb
@@ -0,0 +1,9 @@
+chip soc/intel/cannonlake
+
+	device cpu_cluster 0 on
+		device lapic 0 on end
+	end
+
+	device domain 0 on
+	end
+end
diff --git a/src/mainboard/intel/cannonlake_rvp/romstage.c b/src/mainboard/intel/cannonlake_rvp/romstage.c
new file mode 100644
index 0000000..64752e2
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/romstage.c
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2010 coresystems GmbH
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+//Nothing here yet, but file needed for build.

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I82bd5c785e451f02b827765c54d432517afd7de0
Gerrit-Change-Number: 20075
Gerrit-PatchSet: 1
Gerrit-Owner: Andrey Petrov <andrey.petrov at intel.com>