[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/gpio: Port gpio code from Apollolake ...

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/19759 )

Change subject: soc/intel/common/block/gpio: Port gpio code from Apollolake to common
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Patch Set 20:

(11 comments)

https://review.coreboot.org/#/c/19759/20/src/soc/intel/common/block/gpio/Kconfig
File src/soc/intel/common/block/gpio/Kconfig:

Line 16: 	default n
It would be helpful to have help text explaining what this config option does. Same with the config option below.


https://review.coreboot.org/#/c/19759/20/src/soc/intel/common/block/gpio/gpio.c
File src/soc/intel/common/block/gpio/gpio.c:

PS20, Line 54: 32
Shouldn't this be GPIO_MAX_NUM_PER_GROUP?


PS20, Line 55: 32
GPIO_MAX_NUM_PER_GROUP?


PS20, Line 80: soc_gpio_configure_itss
Why does this have soc_ in its name?


PS20, Line 105: pad_cfg_offset + sizeof(uint32_t)
It would be better to have macros like PAD_CFG1_OFFSET, PAD_CFG0_OFFSET defined as:

#define PAD_CFG0_OFFSET(x)         ((x) + GPIO_DWx_SIZE(0))
#define PAD_CFG1_OFFSET(x)         ((x) + GPIO_DWx_SIZE(1))

That way it will be clear what register is being read/written to.


PS20, Line 123: PAD_CFG_BASE
I believe this has to be provided by the SoC. It would be good to document it somewhere what exactly is expected to be implemented by the SoC. Might also be a good idea to have an assert here to ensure that we catch it early if SoC fails to initialize this.


PS20, Line 155: gpio_configure_owner(cfg, comm->port, cfg->pad - comm->first_pad);
              : 
              : 	gpi_enable_smi(cfg, comm->port, cfg->pad - comm->first_pad);
You can also just pass in cfg and comm and let the called function deal with what parameters it wants to use:
gpio_configure_owner(cfg, comm);
gpi_enable_smi(cfg, comm);


PS20, Line 247: int index = 0
You are setting this before using. No need to initialize it to 0.


https://review.coreboot.org/#/c/19759/20/src/soc/intel/common/block/include/intelblocks/gpio.h
File src/soc/intel/common/block/include/intelblocks/gpio.h:

Line 67: 
extra blank line


PS20, Line 87:  
extra blank


Line 112: 
blank line not needed?


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Gerrit-MessageType: comment
Gerrit-Change-Id: Ic48401e92103ff0ec278fb69a3d304148a2d79aa
Gerrit-PatchSet: 20
Gerrit-Project: coreboot
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