[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Add macro for setting GPIO interrupt trig...

[Kane Chen (Code Review)]

Kane Chen has posted comments on this change. ( https://review.coreboot.org/19992 )

Change subject: soc/intel/skylake: Add macro for setting GPIO interrupt trigger mode.
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Patch Set 4:

Hi Aaron,
In OS, kernel already sets the gpio interrupt trigger mode to edge, but apparently coreboot sets it back to level during s3 resume.
I think coreboot should at least make the trigger mode same with GpioInt.
thanks.

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Gerrit-MessageType: comment
Gerrit-Change-Id: I42b9cd80b494e24c55b97e54cdf59bfd24dd9054
Gerrit-PatchSet: 4
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Kane Chen <kane.chen at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Kane Chen <kane.chen at intel.com>
Gerrit-Reviewer: Naresh Solanki <naresh.solanki at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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