[coreboot-gerrit] Change in coreboot[master]: mb/google/fizz: set SD_CDZ to edge trigger.

[Kane Chen (Code Review)]

Kane Chen has uploaded a new change for review. ( https://review.coreboot.org/20001 )

Change subject: mb/google/fizz: set SD_CDZ to edge trigger.
......................................................................

mb/google/fizz: set SD_CDZ to edge trigger.

This is to align with the SD_CD GpioInt setting in acpi

BUG=b:62067569
TEST=checked unused interrupt on SD_CD does not happen after s3 resume

Change-Id: I40aefcb0f571e7f6773a6d20226f357707aa041a
Signed-off-by: Kane Chen <kane.chen at intel.com>
---
M src/mainboard/google/fizz/gpio.h
1 file changed, 1 insertion(+), 1 deletion(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/20001/1

diff --git a/src/mainboard/google/fizz/gpio.h b/src/mainboard/google/fizz/gpio.h
index 07d9281..b0861ee 100644
--- a/src/mainboard/google/fizz/gpio.h
+++ b/src/mainboard/google/fizz/gpio.h
@@ -42,7 +42,7 @@
 /* ESPI_IO3 */
 /* ESPI_CS# */
 /* SERIRQ */		PAD_CFG_NC(GPP_A6), /* TP331 */
-/* PIRQA# */		PAD_CFG_GPI(GPP_A7, 20K_PU, DEEP), /* SD_CDZ */
+/* PIRQA# */		PAD_CFG_GPIINT_EDGE(GPP_A7, 20K_PU, DEEP), /* SD_CDZ */
 /* CLKRUN# */		PAD_CFG_NC(GPP_A8), /* TP329 */
 /* ESPI_CLK */
 /* CLKOUT_LPC1 */	PAD_CFG_NC(GPP_A10), /* TP188 */

-- 
To view, visit https://review.coreboot.org/20001
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-MessageType: newchange
Gerrit-Change-Id: I40aefcb0f571e7f6773a6d20226f357707aa041a
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Kane Chen <kane.chen at intel.com>