[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Skip disabled IGD device

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/20829


Change subject: soc/intel/skylake: Skip disabled IGD device
......................................................................

soc/intel/skylake: Skip disabled IGD device

If IGD PCI device is disabled:
1. BAR for the device will be 0.
2. There is no need to allocate framebuffer for this device.

Some early SOCs don't have GFX model fuse by default hence
we need to add a check to ensure PCI device is enable. This
code to avoid die inside coreboot for missing resources.

Change-Id: Ic31d3e57ba730f6b569bf2cc3bdc54cb369b8caf
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/soc/intel/skylake/igd.c
1 file changed, 7 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/20829/1

diff --git a/src/soc/intel/skylake/igd.c b/src/soc/intel/skylake/igd.c
index dbcbd4d..62bcf42 100644
--- a/src/soc/intel/skylake/igd.c
+++ b/src/soc/intel/skylake/igd.c
@@ -36,7 +36,13 @@
 
 uintptr_t fsp_soc_get_igd_bar(void)
 {
-	return find_resource(SA_DEV_IGD, PCI_BASE_ADDRESS_2)->base;
+	device_t dev = SA_DEV_IGD;
+
+	/* Check if IGD PCI device is disabled */
+	if (!dev->enabled)
+		return 0;
+
+	return find_resource(dev, PCI_BASE_ADDRESS_2)->base;
 }
 
 u32 map_oprom_vendev(u32 vendev)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic31d3e57ba730f6b569bf2cc3bdc54cb369b8caf
Gerrit-Change-Number: 20829
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
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