[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Add CNVI and PCIE IRQs for GLK

build bot (Jenkins) (Code Review) gerrit at coreboot.org
Thu Jul 27 01:58:31 CEST 2017


build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20755 )

Change subject: soc/intel/apollolake: Add CNVI and PCIE IRQs for GLK
......................................................................


Patch Set 1: Verified+1

Build Successful 

https://qa.coreboot.org/job/coreboot-gerrit/57885/ : SUCCESS

https://qa.coreboot.org/job/coreboot-checkpatch/13331/ : SUCCESS


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I0387ccf6970e6169cbebd232ae210731338d0900
Gerrit-Change-Number: 20755
Gerrit-PatchSet: 1
Gerrit-Owner: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Wed, 26 Jul 2017 23:58:31 +0000
Gerrit-HasComments: No
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