[coreboot-gerrit] Change in coreboot[master]: mb/hp: Add common code for Sandy/Ivy Bridge HP Elitebooks
Iru Cai (Code Review)
gerrit at coreboot.org
Wed Jul 26 08:52:16 CEST 2017
Iru Cai has uploaded this change for review. ( https://review.coreboot.org/20776
Change subject: mb/hp: Add common code for Sandy/Ivy Bridge HP Elitebooks
......................................................................
mb/hp: Add common code for Sandy/Ivy Bridge HP Elitebooks
Change-Id: I5d53bee1b957a34b018b47db8fc3653dd41b1b12
Signed-off-by: Iru Cai <mytbk920423 at gmail.com>
---
A src/mainboard/hp/elitebook_snb_ivb/Kconfig
A src/mainboard/hp/elitebook_snb_ivb/Makefile.inc
A src/mainboard/hp/elitebook_snb_ivb/acpi/ec.asl
A src/mainboard/hp/elitebook_snb_ivb/acpi/platform.asl
A src/mainboard/hp/elitebook_snb_ivb/acpi/superio.asl
A src/mainboard/hp/elitebook_snb_ivb/acpi_tables.c
A src/mainboard/hp/elitebook_snb_ivb/dsdt.asl
A src/mainboard/hp/elitebook_snb_ivb/gma-mainboard.ads
A src/mainboard/hp/elitebook_snb_ivb/hda_verb.c
A src/mainboard/hp/elitebook_snb_ivb/mainboard.c
A src/mainboard/hp/elitebook_snb_ivb/romstage.c
11 files changed, 313 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/20776/1
diff --git a/src/mainboard/hp/elitebook_snb_ivb/Kconfig b/src/mainboard/hp/elitebook_snb_ivb/Kconfig
new file mode 100644
index 0000000..dfac1e2
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/Kconfig
@@ -0,0 +1,41 @@
+config HP_ELITEBOOK_SNB_IVB
+ def_bool n
+ select EC_ACPI
+ select HAVE_ACPI_RESUME
+ select HAVE_ACPI_TABLES
+ select INTEL_INT15
+ select SANDYBRIDGE_IVYBRIDGE_LVDS
+ select SERIRQ_CONTINUOUS_MODE
+ select SYSTEM_TYPE_LAPTOP
+ select USE_NATIVE_RAMINIT
+ select EC_HP_KBC1126
+ select MAINBOARD_HAS_LIBGFXINIT
+ select GFX_GMA_INTERNAL_IS_LVDS
+
+if HP_ELITEBOOK_SNB_IVB
+
+config HAVE_IFD_BIN
+ bool
+ default n
+
+config HAVE_ME_BIN
+ bool
+ default n
+
+config MAINBOARD_DIR
+ string
+ default hp/elitebook_snb_ivb
+
+config MMCONF_BASE_ADDRESS
+ hex
+ default 0xf0000000
+
+config DRAM_RESET_GATE_GPIO
+ int
+ default 60
+
+config MAX_CPUS
+ int
+ default 8
+
+endif
diff --git a/src/mainboard/hp/elitebook_snb_ivb/Makefile.inc b/src/mainboard/hp/elitebook_snb_ivb/Makefile.inc
new file mode 100644
index 0000000..4e8f96a
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/Makefile.inc
@@ -0,0 +1,21 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2017 Iru Cai <mytbk920423 at gmail.com>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+
+subdirs-$(CONFIG_BOARD_HP_2760P) += ../2760p
+subdirs-$(CONFIG_BOARD_HP_2570P) += ../2570p
+subdirs-$(CONFIG_BOARD_HP_8460P) += ../8460p
+subdirs-$(CONFIG_BOARD_HP_8470P) += ../8470p
diff --git a/src/mainboard/hp/elitebook_snb_ivb/acpi/ec.asl b/src/mainboard/hp/elitebook_snb_ivb/acpi/ec.asl
new file mode 100644
index 0000000..ac65fb3
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/acpi/ec.asl
@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Iru Cai <mytbk920423 at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <ec/hp/kbc1126/acpi/ec.asl>
diff --git a/src/mainboard/hp/elitebook_snb_ivb/acpi/platform.asl b/src/mainboard/hp/elitebook_snb_ivb/acpi/platform.asl
new file mode 100644
index 0000000..79eddcb
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/acpi/platform.asl
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011-2012 The Chromium OS Authors. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Method(_WAK,1)
+{
+ Return(Package(){0,0})
+}
+
+Method(_PTS,1)
+{
+}
diff --git a/src/mainboard/hp/elitebook_snb_ivb/acpi/superio.asl b/src/mainboard/hp/elitebook_snb_ivb/acpi/superio.asl
new file mode 100644
index 0000000..b3ea115
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/acpi/superio.asl
@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <drivers/pc80/pc/ps2_controller.asl>
diff --git a/src/mainboard/hp/elitebook_snb_ivb/acpi_tables.c b/src/mainboard/hp/elitebook_snb_ivb/acpi_tables.c
new file mode 100644
index 0000000..6b731cc
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/acpi_tables.c
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ * Copyright (C) 2014 Vladimir Serbinenko
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <southbridge/intel/bd82x6x/nvs.h>
+
+/* FIXME: check this function. */
+void acpi_create_gnvs(global_nvs_t *gnvs)
+{
+ /* Disable USB ports in S3 by default */
+ gnvs->s3u0 = 0;
+ gnvs->s3u1 = 0;
+
+ /* Disable USB ports in S5 by default */
+ gnvs->s5u0 = 0;
+ gnvs->s5u1 = 0;
+
+ // the lid is open by default.
+ gnvs->lids = 1;
+
+ gnvs->tcrt = 100;
+ gnvs->tpsv = 90;
+}
diff --git a/src/mainboard/hp/elitebook_snb_ivb/dsdt.asl b/src/mainboard/hp/elitebook_snb_ivb/dsdt.asl
new file mode 100644
index 0000000..d4fab7a
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/dsdt.asl
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
+#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ 0x03, // DSDT revision: ACPI v3.0
+ "COREv4", // OEM id
+ "COREBOOT", // OEM table id
+ 0x20141018 // OEM revision
+)
+{
+ // Some generic macros
+ #include "acpi/platform.asl"
+ #include <cpu/intel/model_206ax/acpi/cpu.asl>
+ #include <southbridge/intel/bd82x6x/acpi/platform.asl>
+ /* global NVS and variables. */
+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
+ #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
+
+ Scope (\_SB) {
+ Device (PCI0)
+ {
+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
+ #include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
+ }
+ }
+}
diff --git a/src/mainboard/hp/elitebook_snb_ivb/gma-mainboard.ads b/src/mainboard/hp/elitebook_snb_ivb/gma-mainboard.ads
new file mode 100644
index 0000000..736dce7
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/gma-mainboard.ads
@@ -0,0 +1,20 @@
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+
+ ports : constant Port_List :=
+ (DP1,
+ DP2,
+ DP3,
+ HDMI1,
+ HDMI2,
+ HDMI3,
+ Analog,
+ Internal,
+ others => Disabled);
+
+end GMA.Mainboard;
diff --git a/src/mainboard/hp/elitebook_snb_ivb/hda_verb.c b/src/mainboard/hp/elitebook_snb_ivb/hda_verb.c
new file mode 100644
index 0000000..e913500
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/hda_verb.c
@@ -0,0 +1 @@
+/* use board specific hda_verb.c */
diff --git a/src/mainboard/hp/elitebook_snb_ivb/mainboard.c b/src/mainboard/hp/elitebook_snb_ivb/mainboard.c
new file mode 100644
index 0000000..d84bff9
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/mainboard.c
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Iru Cai <mytbk920423 at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/device.h>
+#include <drivers/intel/gma/int15.h>
+
+static void mainboard_enable(device_t dev)
+{
+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
+ GMA_INT15_PANEL_FIT_DEFAULT,
+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+}
+
+struct chip_operations mainboard_ops = {
+ .enable_dev = mainboard_enable,
+};
diff --git a/src/mainboard/hp/elitebook_snb_ivb/romstage.c b/src/mainboard/hp/elitebook_snb_ivb/romstage.c
new file mode 100644
index 0000000..0c3f2f1
--- /dev/null
+++ b/src/mainboard/hp/elitebook_snb_ivb/romstage.c
@@ -0,0 +1,65 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Iru Cai <mytbk920423 at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+#include <superio/smsc/lpc47n217/lpc47n217.h>
+#include <ec/hp/kbc1126/ec.h>
+
+#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1)
+
+void pch_enable_lpc(void)
+{
+ pci_write_config16(PCH_LPC_DEV, LPC_EN, 0x3f0f);
+ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010);
+ pci_write_config32(PCH_LPC_DEV, ETR3, 0x02010000);
+}
+
+void rcba_config(void)
+{
+ RCBA32(BUC) = 0;
+}
+
+void mainboard_early_init(int s3resume)
+{
+}
+
+void mainboard_config_superio(void)
+{
+ if (IS_ENABLED(CONFIG_SUPERIO_SMSC_LPC47N217))
+ lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ else
+ kbc1126_disable4e();
+
+ kbc1126_enter_conf();
+ kbc1126_mailbox_init();
+ kbc1126_kbc_init();
+ kbc1126_ec_init();
+
+ if (IS_ENABLED(CONFIG_BOARD_HP_2760P))
+ kbc1126_com1_init();
+
+ kbc1126_pm1_init();
+ kbc1126_exit_conf();
+}
+
+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
+{
+ read_spd(&spd[0], 0x50, id_only);
+ read_spd(&spd[2], 0x52, id_only);
+}
--
To view, visit https://review.coreboot.org/20776
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5d53bee1b957a34b018b47db8fc3653dd41b1b12
Gerrit-Change-Number: 20776
Gerrit-PatchSet: 1
Gerrit-Owner: Iru Cai <mytbk920423 at gmail.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20170726/44cc3f86/attachment-0001.html>
More information about the coreboot-gerrit
mailing list