[coreboot-gerrit] Change in coreboot[master]: payloads/external/tianocore: Update to build uefi corebootpayload
Evelyn Huang (Code Review)
gerrit at coreboot.org
Tue Jul 25 23:27:02 CEST 2017
Evelyn Huang has uploaded this change for review. ( https://review.coreboot.org/20756
Change subject: payloads/external/tianocore: Update to build uefi corebootpayload
......................................................................
payloads/external/tianocore: Update to build uefi corebootpayload
Update the existing tianocore payload (which didn't do any more than
adding an elf payload with a specific name) to fetch and build the
UEFI corebootPayloadPackage
Only compiles with GCC 4.8, therefore the host compiler is used.
Currently working if patches are merged into the upstream
edk2 repository.
Missing: Intel GOP and GOP FB support
Change-Id: I9719ca5c39fccb856dfe096d449760a937d51fd1
Signed-off-by: Martin Roth <martinroth at google.com>
Signed-off-by: Philipp Deppenwiese <zaolin at das-labor.org>
payloads/external/tianocore/tianocore Use coreboot's toolchain
Use coreboot's toolchain to build tianocore.
Change-Id: I0c5553b5b6d6d8e616e0e9bbaaccd41d297e1842
Signed-off-by: Evelyn Huang <evhuang at google.com>
---
M .gitignore
M payloads/Makefile.inc
M payloads/external/Makefile.inc
M payloads/external/tianocore/Kconfig
M payloads/external/tianocore/Kconfig.name
A payloads/external/tianocore/Makefile
A payloads/external/tianocore/tools_def.txt
7 files changed, 350 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/20756/7
diff --git a/.gitignore b/.gitignore
index 61be9f7..f61d9dd 100644
--- a/.gitignore
+++ b/.gitignore
@@ -17,6 +17,7 @@
payloads/external/FILO/filo/
payloads/external/GRUB2/grub2/
payloads/external/SeaBIOS/seabios/
+payloads/external/tianocore/tianocore/
payloads/external/tint/tint/
payloads/external/U-Boot/u-boot/
payloads/external/Memtest86Plus/memtest86plus/
diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
index 2d7edb6..63a2a45 100644
--- a/payloads/Makefile.inc
+++ b/payloads/Makefile.inc
@@ -30,7 +30,8 @@
payloads/external/U-Boot \
payloads/external/Memtest86Plus \
payloads/external/iPXE \
-payloads/external/tint
+payloads/external/tint \
+payloads/external/tianocore
payloads/coreinfo/build/coreinfo.elf coreinfo:
$(MAKE) -C payloads/coreinfo defaultbuild
diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc
index 6bc1651..fba4532 100644
--- a/payloads/external/Makefile.inc
+++ b/payloads/external/Makefile.inc
@@ -114,7 +114,25 @@
DEPTHCHARGE_REVISION_ID=$(CONFIG_DEPTHCHARGE_REVISION_ID) \
OVERRIDE_DEFCONFIG=$(CONFIG_LP_DEFCONFIG_OVERRIDE)
-# FILO
+payloads/external/tianocore/tianocore/Build/UEFIPAYLOAD.fd tianocore: $(DOTCONFIG)
+ $(MAKE) -C payloads/external/tianocore all \
+ HOSTCC="$(HOSTCC)" \
+ CC="$(HOSTCC)" \
+ CONFIG_TIANOCORE_MASTER=$(CONFIG_TIANOCORE_MASTER) \
+ CONFIG_TIANOCORE_STABLE=$(CONFIG_TIANOCORE_STABLE) \
+ CONFIG_TIANOCORE_REVISION=$(CONFIG_TIANOCORE_REVISION) \
+ CONFIG_TIANOCORE_REVISION_ID=$(CONFIG_TIANOCORE_REVISION_ID) \
+ CONFIG_TIANOCORE_DEBUG=$(CONFIG_TIANOCORE_DEBUG) \
+ CONFIG_TIANOCORE_TARGET_IA32=$(CONFIG_TIANOCORE_TARGET_IA32) \
+ GCC_CC_x86_32=$(GCC_CC_x86_32) \
+ GCC_CC_x86_64=$(GCC_CC_x86_64) \
+ GCC_CC_arm=$(GCC_CC_arm) \
+ GCC_CC_arm64=$(GCC_CC_arm64) \
+ OBJCOPY_x86_32=$(OBJCOPY_x86_32) \
+ OBJCOPY_x86_64=$(OBJCOPY_x86_64) \
+ OBJCOPY_arm=$(OBJCOPY_arm) \
+ OBJCOPY_arm64=$(OBJCOPY_arm64) \
+ MFLAGS= MAKEFLAGS=
filo:
$(MAKE) -C payloads/external/FILO \
diff --git a/payloads/external/tianocore/Kconfig b/payloads/external/tianocore/Kconfig
index 8a98bd3..ab53efd 100644
--- a/payloads/external/tianocore/Kconfig
+++ b/payloads/external/tianocore/Kconfig
@@ -1,9 +1,54 @@
if PAYLOAD_TIANOCORE
config PAYLOAD_FILE
- string "Tianocore firmware volume"
- default "COREBOOT.fd"
+ string "Tianocore binary"
+ default "payloads/external/tianocore/tianocore/Build/UEFIPAYLOAD.fd"
help
The result of a corebootPkg build
+choice
+ prompt "Tianocore version"
+ default TIANOCORE_STABLE
+
+config TIANOCORE_STABLE
+ bool "stable"
+ help
+ Stable TianoCore version
+
+config TIANOCORE_MASTER
+ bool "master"
+ help
+ Newest Tianocore version
+
+config TIANOCORE_REVISION
+ bool "git revision"
+ help
+ Select this option if you have a specific commit or branch
+ that you want to use as the revision from which to
+ build Tianocore.
+
+ You will be able to specify the name of a branch or a commit id
+ later.
+
+endchoice
+
+config TIANOCORE_REVISION_ID
+ string "Insert a commit's SHA-1 or a branch name"
+ depends on TIANOCORE_REVISION
+ default "origin/master"
+ help
+ The commit's SHA-1 or branch name of the revision to use.
+
+config TIANOCORE_TARGET_IA32
+ bool "Restrict Tianocore target architecture to IA32"
+ help
+ By default, the Tianocore coreboot Payload Package binary will be
+ built for both X64 and IA32 architectures. By selecting this option,
+ the target architecture can be restricted to only IA32.
+
+config TIANOCORE_DEBUG
+ bool "Generate Tianocore debug build"
+ help
+ Generate a debug build instead of a release build.
+
endif
diff --git a/payloads/external/tianocore/Kconfig.name b/payloads/external/tianocore/Kconfig.name
index 11451b0..e57925f 100644
--- a/payloads/external/tianocore/Kconfig.name
+++ b/payloads/external/tianocore/Kconfig.name
@@ -1,8 +1,8 @@
config PAYLOAD_TIANOCORE
- bool "Tiano Core"
+ bool "Tianocore coreboot payload package"
help
Select this option if you want to build a coreboot image
- with a Tiano Core payload. If you don't know what this is
+ with a Tianocore payload. If you don't know what this is
about, just leave it enabled.
See https://coreboot.org/Payloads for more information.
diff --git a/payloads/external/tianocore/Makefile b/payloads/external/tianocore/Makefile
new file mode 100644
index 0000000..720431c
--- /dev/null
+++ b/payloads/external/tianocore/Makefile
@@ -0,0 +1,99 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+# force the shell to bash - the edksetup.sh script doesn't work with dash
+export SHELL := env bash
+
+STABLE_COMMIT_ID=315d9d08fd77db1024ccc5307823da8aaed85e2f
+TAG-$(CONFIG_TIANOCORE_MASTER)=origin/master
+TAG-$(CONFIG_TIANOCORE_STABLE)=$(STABLE_COMMIT_ID)
+
+project_name=Tianocore
+project_dir=$(CURDIR)/tianocore
+project_git_repo=https://github.com/tianocore/edk2
+
+export EDK_TOOLS_PATH=$(project_dir)/BaseTools
+
+ifeq ($(CONFIG_TIANOCORE_DEBUG),y)
+BUILD_TYPE=DEBUG
+else
+BUILD_TYPE=RELEASE
+endif
+
+all: build
+
+$(project_dir):
+ echo " Cloning $(project_name) from Git"
+ git clone $(project_git_repo) $(project_dir)
+
+fetch: $(project_dir)
+ cd $(project_dir); \
+ git show $(TAG-y) >/dev/null 2>&1 ; \
+ if [ $$? -ne 0 ] || [ "$(TAG-y)" = "origin/master" ]; then \
+ echo " Fetching new commits from the $(project_name) repo"; \
+ git fetch; \
+ fi
+
+checkout: fetch
+ echo " Checking out $(project_name) revision $(TAG-y)"
+ cd $(project_dir); \
+ git checkout master; \
+ git branch -D coreboot 2>/dev/null; \
+ git checkout -b coreboot $(TAG-y)
+
+checktools:
+ printf "Checking uuid-dev..."
+ echo "#include <uuid/uuid.h>" > libtest.c
+ echo "int main(int argc, char **argv) { (void) argc; (void) argv; return 0; }" >> libtest.c
+ $(HOSTCC) $(HOSTCCFLAGS) libtest.c -o libtest >/dev/null 2>&1 && printf " found uuid-dev.\n" || \
+ ( printf " Not found.\n"; echo "ERROR: please_install uuid-dev (uuid-devel)"; exit 1 )
+ rm -rf libtest.c libtest
+ printf "Checking nasm..."
+ type nasm > /dev/null 2>&1 && printf " found nasm.\n" || \
+ ( printf " Not found.\n"; echo "Error: Please install nasm."; exit 1 )
+
+config: checkout checktools
+ unset CC; $(MAKE) -C $(project_dir)/BaseTools
+ cd $(project_dir); \
+ export EDK_TOOLS_PATH=$(project_dir)/BaseTools; \
+ export WORKSPACE=$(project_dir); \
+ . ./edksetup.sh BaseTools
+
+build: config
+ echo " build $(project_name) $(TAG-y)"
+ifeq ($(CONFIG_TIANOCORE_TARGET_IA32), y)
+ cd $(project_dir); \
+ export EDK_TOOLS_PATH=$(project_dir)/BaseTools; \
+ export WORKSPACE=$(project_dir); \
+ . ./edksetup.sh BaseTools; \
+ cat ../tools_def.txt >> $(project_dir)/Conf/tools_def.txt; \
+ build -a IA32 -t COREBOOT -p CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc -b $(BUILD_TYPE)
+else
+ cd $(project_dir); \
+ export EDK_TOOLS_PATH=$(project_dir)/BaseTools; \
+ export WORKSPACE=$(project_dir); \
+ . ./edksetup.sh BaseTools; \
+ cat ../tools_def.txt >> $(project_dir)/Conf/tools_def.txt; \
+ build -a IA32 -a X64 -t COREBOOT -p CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc -b $(BUILD_TYPE)
+endif
+ mv $(project_dir)/Build/CorebootPayloadPkg*/*/FV/UEFIPAYLOAD.fd $(project_dir)/Build/UEFIPAYLOAD.fd
+
+clean:
+ test -d $(project_dir) && (cd $(project_dir); rm -rf Build; rm -f Conf/tools_def.txt) || exit 0
+
+distclean:
+ rm -rf $(project_dir)
+
+.PHONY: all fetch checkout checktools config build clean distclean
diff --git a/payloads/external/tianocore/tools_def.txt b/payloads/external/tianocore/tools_def.txt
new file mode 100755
index 0000000..99ceec5
--- /dev/null
+++ b/payloads/external/tianocore/tools_def.txt
@@ -0,0 +1,180 @@
+#
+# Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2015, Hewlett-Packard Development Company, L.P.<BR>
+# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+DEFINE COREBOOT_IA32_PREFIX = ENV(GCC_CC_x86_32)
+DEFINE COREBOOT_X64_PREFIX = ENV(GCC_CC_x86_64)
+DEFINE COREBOOT_ARM_PREFIX = ENV(GCC_CC_arm)
+DEFINE COREBOOT_ARM64_PREFIX = ENV(GCC_CC_arm64)
+
+DEFINE COREBOOT_IA32_OBJCOPY = ENV(OBJCOPY_x86_32)
+DEFINE COREBOOT_X64_OBJCOPY = ENV(OBJCOPY_x86_64)
+DEFINE COREBOOT_ARM_OBJCOPY = ENV(OBJCOPY_arm)
+DEFINE COREBOOT_ARM64_OBJCOPY = ENV(OBJCOPY_arm64)
+
+####################################################################################
+#
+# COREBOOT - This configuration is used to compile under Linux to produce
+# PE/COFF binaries using coreboot's toolchain
+#
+##################################################################################
+
+*_COREBOOT_*_*_FAMILY = GCC
+
+*_COREBOOT_*_MAKE_PATH = make
+*_COREBOOT_*_*_DLL = ENV(GCC5_DLL)
+*_COREBOOT_*_ASL_PATH = DEF(UNIX_IASL_BIN)
+
+*_COREBOOT_*_PP_FLAGS = DEF(GCC_PP_FLAGS)
+*_COREBOOT_*_ASLPP_FLAGS = DEF(GCC_ASLPP_FLAGS)
+*_COREBOOT_*_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS)
+*_COREBOOT_*_VFRPP_FLAGS = DEF(GCC_VFRPP_FLAGS)
+*_COREBOOT_*_APP_FLAGS =
+*_COREBOOT_*_ASL_FLAGS = DEF(IASL_FLAGS)
+*_COREBOOT_*_ASL_OUTFLAGS = DEF(IASL_OUTFLAGS)
+
+##################
+# COREBOOT IA32 definitions
+##################
+*_COREBOOT_IA32_OBJCOPY_PATH = DEF(COREBOOT_IA32_OBJCOPY)
+*_COREBOOT_IA32_CC_PATH = DEF(COREBOOT_IA32_PREFIX)
+*_COREBOOT_IA32_SLINK_PATH = DEF(COREBOOT_IA32_PREFIX)-ar
+*_COREBOOT_IA32_DLINK_PATH = DEF(COREBOOT_IA32_PREFIX)
+*_COREBOOT_IA32_ASLDLINK_PATH = DEF(COREBOOT_IA32_PREFIX)
+*_COREBOOT_IA32_ASM_PATH = DEF(COREBOOT_IA32_PREFIX)
+*_COREBOOT_IA32_PP_PATH = DEF(COREBOOT_IA32_PREFIX)
+*_COREBOOT_IA32_VFRPP_PATH = DEF(COREBOOT_IA32_PREFIX)
+*_COREBOOT_IA32_ASLCC_PATH = DEF(COREBOOT_IA32_PREFIX)
+*_COREBOOT_IA32_ASLPP_PATH = DEF(COREBOOT_IA32_PREFIX)
+*_COREBOOT_IA32_RC_PATH = DEF(COREBOOT_IA32_OBJCOPY)
+
+*_COREBOOT_IA32_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS) -m32 -fno-lto
+*_COREBOOT_IA32_ASLDLINK_FLAGS = DEF(GCC5_IA32_X64_ASLDLINK_FLAGS) -Wl,-m,elf_i386
+*_COREBOOT_IA32_ASM_FLAGS = DEF(GCC5_ASM_FLAGS) -m32 -march=i386
+*_COREBOOT_IA32_DLINK2_FLAGS = DEF(GCC5_IA32_DLINK2_FLAGS)
+*_COREBOOT_IA32_RC_FLAGS = DEF(GCC_IA32_RC_FLAGS)
+*_COREBOOT_IA32_OBJCOPY_FLAGS =
+*_COREBOOT_IA32_NASM_FLAGS = -f elf32
+
+ DEBUG_COREBOOT_IA32_CC_FLAGS = DEF(GCC5_IA32_CC_FLAGS) -flto -Os
+ DEBUG_COREBOOT_IA32_DLINK_FLAGS = DEF(GCC5_IA32_X64_DLINK_FLAGS) -flto -Os -Wl,-m,elf_i386,--oformat=elf32-i386
+
+RELEASE_COREBOOT_IA32_CC_FLAGS = DEF(GCC5_IA32_CC_FLAGS) -flto -Os -Wno-unused-but-set-variable
+RELEASE_COREBOOT_IA32_DLINK_FLAGS = DEF(GCC5_IA32_X64_DLINK_FLAGS) -flto -Os -Wl,-m,elf_i386,--oformat=elf32-i386
+
+ NOOPT_COREBOOT_IA32_CC_FLAGS = DEF(GCC5_IA32_CC_FLAGS) -O0
+ NOOPT_COREBOOT_IA32_DLINK_FLAGS = DEF(GCC5_IA32_X64_DLINK_FLAGS) -Wl,-m,elf_i386,--oformat=elf32-i386 -O0
+
+##################
+# COREBOOT X64 definitions
+##################
+*_COREBOOT_X64_OBJCOPY_PATH = DEF(COREBOOT_X64_OBJCOPY)
+*_COREBOOT_X64_CC_PATH = DEF(COREBOOT_X64_PREFIX)
+*_COREBOOT_X64_SLINK_PATH = DEF(COREBOOT_X64_PREFIX)-ar
+*_COREBOOT_X64_DLINK_PATH = DEF(COREBOOT_X64_PREFIX)
+*_COREBOOT_X64_ASLDLINK_PATH = DEF(COREBOOT_X64_PREFIX)
+*_COREBOOT_X64_ASM_PATH = DEF(COREBOOT_X64_PREFIX)
+*_COREBOOT_X64_PP_PATH = DEF(COREBOOT_X64_PREFIX)
+*_COREBOOT_X64_VFRPP_PATH = DEF(COREBOOT_X64_PREFIX)
+*_COREBOOT_X64_ASLCC_PATH = DEF(COREBOOT_X64_PREFIX)
+*_COREBOOT_X64_ASLPP_PATH = DEF(COREBOOT_X64_PREFIX)
+*_COREBOOT_X64_RC_PATH = DEF(COREBOOT_X64_OBJCOPY)
+
+*_COREBOOT_X64_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS) -m64 -fno-lto
+*_COREBOOT_X64_ASLDLINK_FLAGS = DEF(GCC5_IA32_X64_ASLDLINK_FLAGS) -Wl,-m,elf_x86_64
+*_COREBOOT_X64_ASM_FLAGS = DEF(GCC5_ASM_FLAGS) -m64
+*_COREBOOT_X64_DLINK2_FLAGS = DEF(GCC5_X64_DLINK2_FLAGS)
+*_COREBOOT_X64_RC_FLAGS = DEF(GCC_X64_RC_FLAGS)
+*_COREBOOT_X64_OBJCOPY_FLAGS =
+*_COREBOOT_X64_NASM_FLAGS = -f elf64
+
+ DEBUG_COREBOOT_X64_CC_FLAGS = DEF(GCC5_X64_CC_FLAGS) -flto -DUSING_LTO -Os
+ DEBUG_COREBOOT_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
+
+RELEASE_COREBOOT_X64_CC_FLAGS = DEF(GCC5_X64_CC_FLAGS) -flto -DUSING_LTO -Os -Wno-unused-but-set-variable
+RELEASE_COREBOOT_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -flto -Os
+
+ NOOPT_COREBOOT_X64_CC_FLAGS = DEF(GCC5_X64_CC_FLAGS) -O0
+ NOOPT_COREBOOT_X64_DLINK_FLAGS = DEF(GCC5_X64_DLINK_FLAGS) -O0
+
+##################
+# COREBOOT ARM definitions
+##################
+*_COREBOOT_ARM_CC_PATH = ENV(COREBOOT_ARM_PREFIX)
+*_COREBOOT_ARM_SLINK_PATH = ENV(COREBOOT_ARM_PREFIX)-ar
+*_COREBOOT_ARM_DLINK_PATH = ENV(COREBOOT_ARM_PREFIX)
+*_COREBOOT_ARM_ASLDLINK_PATH = ENV(COREBOOT_ARM_PREFIX)
+*_COREBOOT_ARM_ASM_PATH = ENV(COREBOOT_ARM_PREFIX)
+*_COREBOOT_ARM_PP_PATH = ENV(COREBOOT_ARM_PREFIX)
+*_COREBOOT_ARM_VFRPP_PATH = ENV(COREBOOT_ARM_PREFIX)
+*_COREBOOT_ARM_ASLCC_PATH = ENV(COREBOOT_ARM_PREFIX)
+*_COREBOOT_ARM_ASLPP_PATH = ENV(COREBOOT_ARM_PREFIX)
+*_COREBOOT_ARM_RC_PATH = ENV(COREBOOT_ARM_OBJCOPY)
+
+*_COREBOOT_ARM_ARCHCC_FLAGS = -mthumb
+*_COREBOOT_ARM_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS)
+*_COREBOOT_ARM_ASLDLINK_FLAGS = DEF(GCC5_ARM_ASLDLINK_FLAGS)
+*_COREBOOT_ARM_ASM_FLAGS = DEF(GCC5_ARM_ASM_FLAGS)
+*_COREBOOT_ARM_DLINK2_FLAGS = DEF(GCC5_ARM_DLINK2_FLAGS)
+*_COREBOOT_ARM_PLATFORM_FLAGS = -march=armv7-a
+*_COREBOOT_ARM_PP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) DEF(GCC_PP_FLAGS)
+*_COREBOOT_ARM_RC_FLAGS = DEF(GCC_ARM_RC_FLAGS)
+*_COREBOOT_ARM_VFRPP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) DEF(GCC_VFRPP_FLAGS)
+*_COREBOOT_ARM_CC_XIPFLAGS = DEF(GCC5_ARM_CC_XIPFLAGS)
+
+ DEBUG_COREBOOT_ARM_CC_FLAGS = DEF(GCC5_ARM_CC_FLAGS) -O0
+ DEBUG_COREBOOT_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS)
+
+RELEASE_COREBOOT_ARM_CC_FLAGS = DEF(GCC5_ARM_CC_FLAGS) -flto -Wno-unused-but-set-variable
+RELEASE_COREBOOT_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-arm -Wl,-plugin-opt=-pass-through=-llto-arm
+
+ NOOPT_COREBOOT_ARM_CC_FLAGS = DEF(GCC5_ARM_CC_FLAGS) -O0
+ NOOPT_COREBOOT_ARM_DLINK_FLAGS = DEF(GCC5_ARM_DLINK_FLAGS) -O0
+
+##################
+# COREBOOT AARCH64 definitions
+##################
+*_COREBOOT_AARCH64_CC_PATH = ENV(COREBOOT_ARM64_PREFIX)
+*_COREBOOT_AARCH64_SLINK_PATH = ENV(COREBOOT_ARM64_PREFIX)-ar
+*_COREBOOT_AARCH64_DLINK_PATH = ENV(COREBOOT_ARM64_PREFIX)
+*_COREBOOT_AARCH64_ASLDLINK_PATH = ENV(COREBOOT_ARM64_PREFIX)
+*_COREBOOT_AARCH64_ASM_PATH = ENV(COREBOOT_ARM64_PREFIX)
+*_COREBOOT_AARCH64_PP_PATH = ENV(COREBOOT_ARM64_PREFIX)
+*_COREBOOT_AARCH64_VFRPP_PATH = ENV(COREBOOT_ARM64_PREFIX)
+*_COREBOOT_AARCH64_ASLCC_PATH = ENV(COREBOOT_ARM64_PREFIX)
+*_COREBOOT_AARCH64_ASLPP_PATH = ENV(COREBOOT_ARM64_PREFIX)
+*_COREBOOT_AARCH64_RC_PATH = ENV(COREBOOT_ARM64_OBJCOPY)
+
+*_COREBOOT_AARCH64_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS)
+*_COREBOOT_AARCH64_ASLDLINK_FLAGS = DEF(GCC5_AARCH64_ASLDLINK_FLAGS)
+*_COREBOOT_AARCH64_ASM_FLAGS = DEF(GCC5_AARCH64_ASM_FLAGS)
+*_COREBOOT_AARCH64_DLINK2_FLAGS = DEF(GCC5_AARCH64_DLINK2_FLAGS)
+*_COREBOOT_AARCH64_PLATFORM_FLAGS =
+*_COREBOOT_AARCH64_PP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) DEF(GCC_PP_FLAGS)
+*_COREBOOT_AARCH64_RC_FLAGS = DEF(GCC_AARCH64_RC_FLAGS)
+*_COREBOOT_AARCH64_VFRPP_FLAGS = $(ARCHCC_FLAGS) $(PLATFORM_FLAGS) DEF(GCC_VFRPP_FLAGS)
+*_COREBOOT_AARCH64_CC_XIPFLAGS = DEF(GCC5_AARCH64_CC_XIPFLAGS)
+
+ DEBUG_COREBOOT_AARCH64_CC_FLAGS = DEF(GCC5_AARCH64_CC_FLAGS) -O0 -mcmodel=small
+ DEBUG_COREBOOT_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -z common-page-size=0x1000
+ DEBUG_COREBOOT_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20
+
+RELEASE_COREBOOT_AARCH64_CC_FLAGS = DEF(GCC5_AARCH64_CC_FLAGS) -flto -Wno-unused-but-set-variable -mcmodel=tiny -fomit-frame-pointer
+RELEASE_COREBOOT_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -flto -Os -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 -Wl,-plugin-opt=-pass-through=-llto-aarch64
+
+ NOOPT_COREBOOT_AARCH64_CC_FLAGS = DEF(GCC5_AARCH64_CC_FLAGS) -O0 -mcmodel=small
+ NOOPT_COREBOOT_AARCH64_DLINK_FLAGS = DEF(GCC5_AARCH64_DLINK_FLAGS) -z common-page-size=0x1000 -O0
+ NOOPT_COREBOOT_AARCH64_DLINK_XIPFLAGS = -z common-page-size=0x20 -O0
+
--
To view, visit https://review.coreboot.org/20756
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I0c5553b5b6d6d8e616e0e9bbaaccd41d297e1842
Gerrit-Change-Number: 20756
Gerrit-PatchSet: 7
Gerrit-Owner: Evelyn Huang <evhuang at google.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier at gmail.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20170725/9e04b624/attachment-0001.html>
More information about the coreboot-gerrit
mailing list