[coreboot-gerrit] Change in coreboot[master]: Port cmos.default handling to C environment bootblock
Nico Huber (Code Review)
gerrit at coreboot.org
Tue Jul 25 16:53:12 CEST 2017
Nico Huber has uploaded this change for review. ( https://review.coreboot.org/20768
Change subject: Port cmos.default handling to C environment bootblock
......................................................................
Port cmos.default handling to C environment bootblock
Gather related code in the new file drivers/pc80/rtc/mc146818rtc_boot.c,
call sanitize_cmos() from C environment bootblock.
Change-Id: Ia5c64de208a5986299c0508d0e11eeb8473deef1
Signed-off-by: Nico Huber <nico.huber at secunet.com>
---
M src/arch/x86/bootblock_normal.c
M src/arch/x86/bootblock_simple.c
M src/arch/x86/include/arch/bootblock_romcc.h
M src/drivers/pc80/rtc/Makefile.inc
A src/drivers/pc80/rtc/mc146818rtc_boot.c
M src/drivers/pc80/rtc/mc146818rtc_romcc.c
M src/include/pc80/mc146818rtc.h
M src/lib/bootblock.c
8 files changed, 87 insertions(+), 56 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/20768/1
diff --git a/src/arch/x86/bootblock_normal.c b/src/arch/x86/bootblock_normal.c
index 4230469..905ecb2 100644
--- a/src/arch/x86/bootblock_normal.c
+++ b/src/arch/x86/bootblock_normal.c
@@ -32,9 +32,8 @@
if (boot_cpu()) {
bootblock_mainboard_init();
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
sanitize_cmos();
-#endif
+
boot_mode = do_normal_boot();
} else {
diff --git a/src/arch/x86/bootblock_simple.c b/src/arch/x86/bootblock_simple.c
index 52c45be..bf71bca 100644
--- a/src/arch/x86/bootblock_simple.c
+++ b/src/arch/x86/bootblock_simple.c
@@ -13,6 +13,7 @@
#include <smp/node.h>
#include <arch/bootblock_romcc.h>
+#include <pc80/mc146818rtc.h>
#include <halt.h>
static void main(unsigned long bist)
@@ -20,9 +21,7 @@
if (boot_cpu()) {
bootblock_mainboard_init();
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
sanitize_cmos();
-#endif
#if IS_ENABLED(CONFIG_CMOS_POST)
cmos_post_init();
#endif
diff --git a/src/arch/x86/include/arch/bootblock_romcc.h b/src/arch/x86/include/arch/bootblock_romcc.h
index 600d360..827e40e 100644
--- a/src/arch/x86/include/arch/bootblock_romcc.h
+++ b/src/arch/x86/include/arch/bootblock_romcc.h
@@ -11,9 +11,7 @@
* GNU General Public License for more details.
*/
-#include <arch/cbfs.h>
#include <cpu/x86/lapic/boot_cpu.c>
-#include <pc80/mc146818rtc.h>
#ifdef CONFIG_BOOTBLOCK_RESETS
#include CONFIG_BOOTBLOCK_RESETS
@@ -43,23 +41,5 @@
#ifdef CONFIG_BOOTBLOCK_CPU_INIT
bootblock_cpu_init();
#endif
-}
-#endif
-
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
-static void sanitize_cmos(void)
-{
- if (cmos_error() || !cmos_chksum_valid()
- || IS_ENABLED(CONFIG_STATIC_OPTION_TABLE)) {
- unsigned char *cmos_default =
- (unsigned char *)walkcbfs("cmos.default");
- if (cmos_default) {
- int i;
- cmos_disable_rtc();
- for (i = 14; i < 128; i++)
- cmos_write_inner(cmos_default[i], i);
- cmos_enable_rtc();
- }
- }
}
#endif
diff --git a/src/drivers/pc80/rtc/Makefile.inc b/src/drivers/pc80/rtc/Makefile.inc
index eb65bf5..998b7e7 100644
--- a/src/drivers/pc80/rtc/Makefile.inc
+++ b/src/drivers/pc80/rtc/Makefile.inc
@@ -1,5 +1,6 @@
ifeq ($(CONFIG_ARCH_X86),y)
+bootblock-$(CONFIG_DRIVERS_MC146818) += mc146818rtc_boot.c
bootblock-$(CONFIG_DRIVERS_MC146818) += mc146818rtc.c
postcar-$(CONFIG_DRIVERS_MC146818) += mc146818rtc.c
romstage-$(CONFIG_DRIVERS_MC146818) += mc146818rtc.c
diff --git a/src/drivers/pc80/rtc/mc146818rtc_boot.c b/src/drivers/pc80/rtc/mc146818rtc_boot.c
new file mode 100644
index 0000000..beb21a1
--- /dev/null
+++ b/src/drivers/pc80/rtc/mc146818rtc_boot.c
@@ -0,0 +1,74 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#if IS_ENABLED(CONFIG_C_ENVIRONMENT_BOOTBLOCK)
+#include <cbfs.h>
+#else
+#include <arch/cbfs.h>
+#endif
+#include <pc80/mc146818rtc.h>
+#include <option_table.h>
+
+static int cmos_error(void)
+{
+ unsigned char reg_d;
+ /* See if the cmos error condition has been flagged */
+ reg_d = cmos_read(RTC_REG_D);
+ return (reg_d & RTC_VRT) == 0;
+}
+
+static int cmos_chksum_valid(void)
+{
+#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+ unsigned char addr;
+ u16 sum, old_sum;
+
+ sum = 0;
+ /* Compute the cmos checksum */
+ for (addr = LB_CKS_RANGE_START; addr <= LB_CKS_RANGE_END; addr++)
+ sum += cmos_read(addr);
+
+ /* Read the stored checksum */
+ old_sum = cmos_read(LB_CKS_LOC) << 8;
+ old_sum |= cmos_read(LB_CKS_LOC + 1);
+
+ return sum == old_sum;
+#else
+ return 0;
+#endif
+}
+
+#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+void sanitize_cmos(void)
+{
+ if (cmos_error() || !cmos_chksum_valid() ||
+ IS_ENABLED(CONFIG_STATIC_OPTION_TABLE)) {
+ size_t length = 128;
+ const unsigned char *const cmos_default =
+#if IS_ENABLED(CONFIG_C_ENVIRONMENT_BOOTBLOCK)
+ cbfs_boot_map_with_leak("cmos.default",
+ CBFS_COMPONENT_CMOS_DEFAULT, &length);
+#else
+ walkcbfs("cmos.default");
+#endif
+ if (cmos_default) {
+ int i;
+ cmos_disable_rtc();
+ for (i = 14; i < MIN(128, length); i++)
+ cmos_write_inner(cmos_default[i], i);
+ cmos_enable_rtc();
+ }
+ }
+}
+#endif
diff --git a/src/drivers/pc80/rtc/mc146818rtc_romcc.c b/src/drivers/pc80/rtc/mc146818rtc_romcc.c
index dc4f2ef..a280882 100644
--- a/src/drivers/pc80/rtc/mc146818rtc_romcc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc_romcc.c
@@ -1,42 +1,12 @@
#include <stdint.h>
#include <pc80/mc146818rtc.h>
#include <fallback.h>
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
-#include "option_table.h"
-#endif
+
+#include "mc146818rtc_boot.c"
#if CONFIG_MAX_REBOOT_CNT > 15
#error "CONFIG_MAX_REBOOT_CNT too high"
#endif
-
-static int cmos_error(void)
-{
- unsigned char reg_d;
- /* See if the cmos error condition has been flagged */
- reg_d = cmos_read(RTC_REG_D);
- return (reg_d & RTC_VRT) == 0;
-}
-
-static int cmos_chksum_valid(void)
-{
-#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
- unsigned char addr;
- u16 sum, old_sum;
-
- sum = 0;
- /* Compute the cmos checksum */
- for (addr = LB_CKS_RANGE_START; addr <= LB_CKS_RANGE_END; addr++)
- sum += cmos_read(addr);
-
- /* Read the stored checksum */
- old_sum = cmos_read(LB_CKS_LOC) << 8;
- old_sum |= cmos_read(LB_CKS_LOC+1);
-
- return sum == old_sum;
-#else
- return 0;
-#endif
-}
static inline __attribute__((unused)) int boot_count(uint8_t rtc_byte)
{
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index f6a1c04..5d7497d 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -254,8 +254,15 @@
static inline void cmos_post_init(void) {}
#endif /* CONFIG_CMOS_POST */
+#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
+void sanitize_cmos(void);
+#else
+static inline void sanitize_cmos(void) {}
+#endif /* CONFIG_USE_OPTION_TABLE */
+
#else /* !CONFIG_ARCH_X86 */
static inline void cmos_post_init(void) {}
+static inline void sanitize_cmos(void) {}
#endif /* CONFIG_ARCH_X86 */
#endif /* PC80_MC146818RTC_H */
diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c
index b859e1e..2e228c6 100644
--- a/src/lib/bootblock.c
+++ b/src/lib/bootblock.c
@@ -36,6 +36,7 @@
if (IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) && _timestamp_size > 0)
timestamp_init(base_timestamp);
+ sanitize_cmos();
cmos_post_init();
bootblock_soc_early_init();
--
To view, visit https://review.coreboot.org/20768
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ia5c64de208a5986299c0508d0e11eeb8473deef1
Gerrit-Change-Number: 20768
Gerrit-PatchSet: 1
Gerrit-Owner: Nico Huber <nico.h at gmx.de>
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