[coreboot-gerrit] Change in coreboot[master]: libpayload/storage: Enable bus mastering for AHCI

[Nico Huber (Code Review)]

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/20763


Change subject: libpayload/storage: Enable bus mastering for AHCI
......................................................................

libpayload/storage: Enable bus mastering for AHCI

This is (thankfully) not done by coreboot any more for recent chipsets.

Change-Id: If56e38037f7b1e53871ee63e6ff297028c59d493
Signed-off-by: Nico Huber <nico.huber at secunet.com>
---
M payloads/libpayload/drivers/storage/ahci.c
1 file changed, 5 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/20763/1

diff --git a/payloads/libpayload/drivers/storage/ahci.c b/payloads/libpayload/drivers/storage/ahci.c
index 0e7fd7d..3a0b99d 100644
--- a/payloads/libpayload/drivers/storage/ahci.c
+++ b/payloads/libpayload/drivers/storage/ahci.c
@@ -34,6 +34,7 @@
 #include <string.h>
 #include <libpayload.h>
 #include <pci.h>
+#include <pci/pci.h>
 #include <storage/ata.h>
 #include <storage/ahci.h>
 
@@ -267,6 +268,10 @@
 	/* Set AHCI access mode. */
 	ctrl->global_ctrl |= HBA_CTRL_AHCI_EN;
 
+	/* Enable bus mastering. */
+	const u16 command = pci_read_config16(dev, PCI_COMMAND);
+	pci_write_config16(dev, PCI_COMMAND, command | PCI_COMMAND_MASTER);
+
 	/* Probe for devices. */
 	for (i = 0; i < 32; ++i) {
 		if (ctrl->ports_impl & (1 << i))

-- 
To view, visit https://review.coreboot.org/20763
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: If56e38037f7b1e53871ee63e6ff297028c59d493
Gerrit-Change-Number: 20763
Gerrit-PatchSet: 1
Gerrit-Owner: Nico Huber <nico.h at gmx.de>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20170725/92ce55ab/attachment.html>