[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Make usage of RAPL selectable

Mario Scheithauer (Code Review) gerrit at coreboot.org
Tue Jul 25 12:28:57 CEST 2017


Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/20759


Change subject: soc/intel/apollolake: Make usage of RAPL selectable
......................................................................

soc/intel/apollolake: Make usage of RAPL selectable

Apollo Lake SoC supports configuration of Running Average Power Limits
(RAPL) for package domain. This feature is not required for all APL
mainboards. According to the APL SoC EDS Vol 4 chapter 18.4 Power
Limiting Control it is not necessary to enable the RAPL algorithm per
default. For that reason make the RAPL configuration selectable.

Change-Id: Ib737b162f72b76c15e5768859f9099e2e7ef6426
Signed-off-by: Mario Scheithauer <mario.scheithauer at siemens.com>
---
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/apollolake/chip.c
2 files changed, 13 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/20759/1

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index a9774dc..a5438df 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -342,4 +342,12 @@
 	int
 	default 100
 
+config APL_SKIP_SET_POWER_LIMITS
+	bool
+	default n
+	help
+	  Some Apollo Lake mainboards do not need the Running Average Power
+	  Limits (RAPL) algorithm for a constant power management.
+	  Set this config option to disable for skip the configuration.
+
 endif
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index f72173d..ec4662c 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -223,6 +223,11 @@
 	uint32_t tdp, min_power, max_power;
 	uint32_t pl2_val;
 
+	if (IS_ENABLED(CONFIG_APL_SKIP_SET_POWER_LIMITS)) {
+		printk(BIOS_INFO, "Skip the RAPL settings.\n");
+		return;
+	}
+
 	if (!dev || !dev->chip_info) {
 		printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
 		return;

-- 
To view, visit https://review.coreboot.org/20759
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib737b162f72b76c15e5768859f9099e2e7ef6426
Gerrit-Change-Number: 20759
Gerrit-PatchSet: 1
Gerrit-Owner: Mario Scheithauer <mario.scheithauer at siemens.com>
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