[coreboot-gerrit] Change in coreboot[master]: I82801JX: Add IS_ENABLED around config options

[Martin Roth (Code Review)]

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/20684


Change subject: I82801JX: Add IS_ENABLED around config options
......................................................................

I82801JX: Add IS_ENABLED around config options

This chipset was just added and had a few places that needed to be
fixed.

Change-Id: Ief048c4876c5a2cb538c9cb4b295aba46a4fff62
Signed-off-by: Martin Roth <martinroth at google.com>
---
M src/cpu/x86/smm/smmrelocate.S
M src/southbridge/intel/i82801jx/acpi/sleepstates.asl
M src/southbridge/intel/i82801jx/i82801jx.c
M src/southbridge/intel/i82801jx/lpc.c
4 files changed, 5 insertions(+), 5 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/20684/1

diff --git a/src/cpu/x86/smm/smmrelocate.S b/src/cpu/x86/smm/smmrelocate.S
index 23d107a..4d388a9 100644
--- a/src/cpu/x86/smm/smmrelocate.S
+++ b/src/cpu/x86/smm/smmrelocate.S
@@ -29,7 +29,7 @@
 #include "../../../soc/intel/sch/sch.h"
 #elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801IX)
 #include "../../../southbridge/intel/i82801ix/i82801ix.h"
-#elif CONFIG_SOUTHBRIDGE_INTEL_I82801JX
+#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801JX)
 #include "../../../southbridge/intel/i82801jx/i82801jx.h"
 
 #else
diff --git a/src/southbridge/intel/i82801jx/acpi/sleepstates.asl b/src/southbridge/intel/i82801jx/acpi/sleepstates.asl
index 62bb026..d7fb2a5 100644
--- a/src/southbridge/intel/i82801jx/acpi/sleepstates.asl
+++ b/src/southbridge/intel/i82801jx/acpi/sleepstates.asl
@@ -15,7 +15,7 @@
  */
 
 Name(\_S0, Package(){0x0,0x0,0x0,0x0})
-#if !CONFIG_HAVE_ACPI_RESUME
+#if !IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
 Name(\_S1, Package(){0x1,0x0,0x0,0x0})
 #else
 Name(\_S3, Package(){0x5,0x0,0x0,0x0})
diff --git a/src/southbridge/intel/i82801jx/i82801jx.c b/src/southbridge/intel/i82801jx/i82801jx.c
index dca3a41..644524d 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.c
+++ b/src/southbridge/intel/i82801jx/i82801jx.c
@@ -222,7 +222,7 @@
 	i82801jx_hide_functions();
 
 	/* Reset watchdog timer. */
-#if !CONFIG_HAVE_SMI_HANDLER
+#if !IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
 	outw(0x0008, DEFAULT_TCOBASE + 0x12); /* Set higher timer value. */
 #endif
 	outw(0x0000, DEFAULT_TCOBASE + 0x00); /* Update timer. */
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 5d3b6b5..edbd0e8 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -369,7 +369,7 @@
 	RCBA32(0x38c0) |= 7;
 }
 
-#if CONFIG_HAVE_SMI_HANDLER
+#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
 static void i82801jx_lock_smm(struct device *dev)
 {
 #if TEST_SMM_FLASH_LOCKDOWN
@@ -464,7 +464,7 @@
 	/* Interrupt 9 should be level triggered (SCI) */
 	i8259_configure_irq_trigger(9, 1);
 
-#if CONFIG_HAVE_SMI_HANDLER
+#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
 	i82801jx_lock_smm(dev);
 #endif
 }

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ief048c4876c5a2cb538c9cb4b295aba46a4fff62
Gerrit-Change-Number: 20684
Gerrit-PatchSet: 1
Gerrit-Owner: Martin Roth <martinroth at google.com>
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