[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Fix build break

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/20567


Change subject: soc/intel/cannonlake: Fix build break
......................................................................

soc/intel/cannonlake: Fix build break

TCO_EN had been redefined with TCO_BASE_EN.

Change-Id: I838c243f9f1885fdc61088b0f712068fe5c0726c
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/bootblock/pch.c
1 file changed, 1 insertion(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/20567/1

diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c
index 9d326bb..d294cea 100644
--- a/src/soc/intel/cannonlake/bootblock/pch.c
+++ b/src/soc/intel/cannonlake/bootblock/pch.c
@@ -139,7 +139,7 @@
 
 	/* Disable TCO in SMBUS Device first before changing Base Address */
 	reg32 = pci_read_config32(PCH_DEV_SMBUS, TCOCTL);
-	reg32 &= ~TCO_EN;
+	reg32 &= ~TCO_BASE_EN;
 	pci_write_config32(PCH_DEV_SMBUS, TCOCTL, reg32);
 
 	/* Program TCO Base */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I838c243f9f1885fdc61088b0f712068fe5c0726c
Gerrit-Change-Number: 20567
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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