[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Minor improvements in northbridge.h
Marshall Dawson (Code Review)
gerrit at coreboot.org
Tue Jul 11 02:36:36 CEST 2017
Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/20525
Change subject: soc/amd/stoneyridge: Minor improvements in northbridge.h
......................................................................
soc/amd/stoneyridge: Minor improvements in northbridge.h
Rename the guard to better match the new directory structure.
Add include files containing typedefs used in the file.
Change-Id: I5fe23ce6994603b0ace99fd6ffc5f3eded2880af
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/stoneyridge/include/soc/northbridge.h
1 file changed, 5 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/20525/1
diff --git a/src/soc/amd/stoneyridge/include/soc/northbridge.h b/src/soc/amd/stoneyridge/include/soc/northbridge.h
index 9ecbb13..5b31eab 100644
--- a/src/soc/amd/stoneyridge/include/soc/northbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/northbridge.h
@@ -13,8 +13,11 @@
* GNU General Public License for more details.
*/
-#ifndef NORTHBRIDGE_AMD_AGESA_FAM15H_H
-#define NORTHBRIDGE_AMD_AGESA_FAM15H_H
+#ifndef PI_STONEYRIDGE_NORTHBRIDGE_H
+#define PI_STONEYRIDGE_NORTHBRIDGE_H
+
+#include <arch/io.h>
+#include <device/device.h>
void cpu_bus_scan(device_t dev);
void domain_enable_resources(device_t dev);
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5fe23ce6994603b0ace99fd6ffc5f3eded2880af
Gerrit-Change-Number: 20525
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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