[coreboot-gerrit] Patch merged into coreboot/master: driver/intel/fsp1_1: Fix boot failure for non-verstage case
gerrit at coreboot.org
gerrit at coreboot.org
Thu Jan 19 08:50:46 CET 2017
the following patch was just integrated into master:
commit d8e34b2c44605d2eb6ed1a955148ac24b9d0cd2e
Author: Teo Boon Tiong <boon.tiong.teo at intel.com>
Date: Wed Dec 28 18:56:26 2016 +0800
driver/intel/fsp1_1: Fix boot failure for non-verstage case
Currently car_stage_entry is defined only in romstage_after_verstage and
as a result when SEPARATE_VERSTAGE is not selected, there is no
entry point into romstage and romstage will not be started at all.
The solution is move out romstage_after_verstage.S from fsp1.1 driver
to skylake/romstage. And add CONFIG_PLATFORM_USES_FSP1_1 to fix the
build and boot issue with this change.
Besides that, rename the romstage_after_verstage to romstage_c_entry
in more appropriate naming convention after this fix.
Tested on SkyLake Saddle Brook (FSP 1.1) and KabyLake Rvp11 (FSP 2.0),
romstage can be started successfully.
Change-Id: I1cd2cf5655fdff6e23b7b76c3974e7dfd3835efd
Signed-off-by: Teo Boon Tiong <boon.tiong.teo at intel.com>
Reviewed-on: https://review.coreboot.org/17976
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/17976 for details.
-gerrit
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