[coreboot-gerrit] New patch to review for coreboot: google/eve: Adjust DPTF parameters
Duncan Laurie (dlaurie@chromium.org)
gerrit at coreboot.org
Wed Jan 18 23:34:11 CET 2017
Duncan Laurie (dlaurie at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18172
-gerrit
commit ed7973d4be637bc371b2675effe9acf45aee25ec
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Wed Jan 18 14:31:59 2017 -0800
google/eve: Adjust DPTF parameters
- Remove the 0mA entry for the charger performance table
- Slightly raise the passive limit for TSR2/TSR3 to 55C
BUG=chrome-os-partner:58666
TEST=manual testing on P1 system
Change-Id: I75c66afe04afbbdb64a45833eb938e57ff21b392
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
src/mainboard/google/eve/acpi/dptf.asl | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/google/eve/acpi/dptf.asl b/src/mainboard/google/eve/acpi/dptf.asl
index 95985f6..eaacb46 100644
--- a/src/mainboard/google/eve/acpi/dptf.asl
+++ b/src/mainboard/google/eve/acpi/dptf.asl
@@ -29,12 +29,12 @@
#define DPTF_TSR2_SENSOR_ID 3
#define DPTF_TSR2_SENSOR_NAME "DRAM"
-#define DPTF_TSR2_PASSIVE 50
+#define DPTF_TSR2_PASSIVE 55
#define DPTF_TSR2_CRITICAL 75
#define DPTF_TSR3_SENSOR_ID 4
#define DPTF_TSR3_SENSOR_NAME "eMMC"
-#define DPTF_TSR3_PASSIVE 50
+#define DPTF_TSR3_PASSIVE 55
#define DPTF_TSR3_CRITICAL 75
#undef DPTF_ENABLE_FAN_CONTROL
@@ -46,7 +46,6 @@ Name (CHPS, Package () {
Package () { 0, 0, 0, 0, 24, 0x800, "mA", 0 }, /* 2000mA */
Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1000mA */
Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 500mA */
- Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 }, /* 0mA */
})
Name (DTRT, Package () {
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