[coreboot-gerrit] Patch set updated for coreboot: cpu/x86: add a barrier with timeout
Bora Guvendik (bora.guvendik@intel.com)
gerrit at coreboot.org
Wed Jan 18 21:27:20 CET 2017
Bora Guvendik (bora.guvendik at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18107
-gerrit
commit 99ed2b1aefb620d5bc5a4fe36f7617441b705e4b
Author: Bora Guvendik <bora.guvendik at intel.com>
Date: Wed Jan 4 16:51:31 2017 -0800
cpu/x86: add a barrier with timeout
In case something goes wrong on one of the
cpus, add the ability to use a barrier with
timeout so that other cpus don't wait forever.
Remove static from barrier wait and release.
BUG=chrome-os-partner:59875
BRANCH=reef
TEST=None
Change-Id: Iab6bd30ddf7632c7a5785b338798960c26016b24
Signed-off-by: Bora Guvendik <bora.guvendik at intel.com>
---
src/cpu/x86/mp_init.c | 19 +++++++++++++++++--
src/include/cpu/x86/mp.h | 6 ++++++
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index c989963..9f95ba5 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -138,7 +138,7 @@ struct cpu_map {
/* Keep track of APIC and device structure for each CPU. */
static struct cpu_map cpus[CONFIG_MAX_CPUS];
-static inline void barrier_wait(atomic_t *b)
+inline void barrier_wait(atomic_t *b)
{
while (atomic_read(b) == 0) {
asm ("pause");
@@ -146,7 +146,22 @@ static inline void barrier_wait(atomic_t *b)
mfence();
}
-static inline void release_barrier(atomic_t *b)
+void barrier_wait_timeout(atomic_t *b, uint32_t timeout_ms)
+{
+ struct mono_time current, end;
+
+ timer_monotonic_get(¤t);
+ end = current;
+ mono_time_add_msecs(&end, timeout_ms);
+
+ while ((atomic_read(b) == 0) && (!mono_time_after(¤t, &end))) {
+ timer_monotonic_get(¤t);
+ asm ("pause");
+ }
+ mfence();
+}
+
+inline void release_barrier(atomic_t *b)
{
mfence();
atomic_set(b, 1);
diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h
index b9b4d57..e700780 100644
--- a/src/include/cpu/x86/mp.h
+++ b/src/include/cpu/x86/mp.h
@@ -150,5 +150,11 @@ int mp_park_aps(void);
void smm_initiate_relocation_parallel(void);
/* Send SMI to self with single execution. */
void smm_initiate_relocation(void);
+/* Make a CPU wait until the barrier is released */
+void barrier_wait(atomic_t *b);
+/* Make a CPU wait until the barrier is released, or timeout occurs */
+void barrier_wait_timeout(atomic_t *b, uint32_t timeout_ms);
+/* Release a barrier so that other CPUs waiting for that barrier can continue*/
+void release_barrier(atomic_t *b);
#endif /* _X86_MP_H_ */
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