[coreboot-gerrit] New patch to review for coreboot: google/snappy: Add weida touchscreen support

Wisley Chen (wisley.chen@quantatw.com) gerrit at coreboot.org
Wed Jan 18 11:26:27 CET 2017


Wisley Chen (wisley.chen at quantatw.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18166

-gerrit

commit b17832c5bb258b3ce171caf385c281406d3a8d31
Author: Wisley Chen <wisley.chen at quantatw.com>
Date:   Wed Jan 18 18:00:11 2017 +0800

    google/snappy: Add weida touchscreen support
    
    Add weida touchscreen as 2nd touchscreen source
    
    BUG=chrome-os-partner:61865
    BRANCH=reef
    TEST=emerge-snappy coreboot, and verified that touchscreen works on
    snappy.
    
    Change-Id: If76312a62e97da9d5de18ad895e90ee6b0f0c6ae
    Signed-off-by: Wisley Chen <wisley.chen at quantatw.com>
---
 src/mainboard/google/reef/Kconfig                       |  3 +++
 src/mainboard/google/reef/variants/snappy/devicetree.cb | 10 ++++++++++
 2 files changed, 13 insertions(+)

diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig
index 0766577..1ef2e88 100644
--- a/src/mainboard/google/reef/Kconfig
+++ b/src/mainboard/google/reef/Kconfig
@@ -44,6 +44,9 @@ config DRIVERS_I2C_DA7219
 config DRIVERS_I2C_GENERIC
 	default y
 
+config DRIVERS_I2C_HID
+	default y
+
 config DRIVERS_I2C_WACOM
 	default y
 
diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb
index dfb414e..91948e8 100644
--- a/src/mainboard/google/reef/variants/snappy/devicetree.cb
+++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb
@@ -187,6 +187,16 @@ chip soc/intel/apollolake
 
 				device i2c 10 on end
 			end
+			chip drivers/i2c/hid
+				register "generic.hid" = ""WDHT0001""
+				register "generic.desc" = ""WDT Touchscreen""
+				register "generic.irq" = "IRQ_EDGE_LOW(GPIO_21_IRQ)"
+				register "generic.probed" = "1"
+				register "generic.pwr_mgmt_type" = "GPIO_EXPORT"
+				register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)"
+				register "hid_desc_reg_offset" = "0x20"
+				device i2c 2c on end
+			end
 		end	# - I2C 3
 		device pci 17.0 on
 			chip drivers/i2c/generic



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