[coreboot-gerrit] Patch merged into coreboot/master: mainboard/google/reef: Ignore SPI IOSTANDBY

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 8b89252f8ad2a79e8bdffc2abf250fc7110f3884
Author: Lijian Zhao <lijian.zhao at intel.com>
Date:   Fri Jan 13 14:01:42 2017 -0800

    mainboard/google/reef: Ignore SPI IOSTANDBY
    
    SPI controller need to access flash descriptors/SFDP during s0ix exit,
    so all fast SPI IO can't be put into IOSTANDBY state. For reef, that
    will be FST_SPI_CLK_FB, GPIO_97, GPIO_99, GPIO_100, GPIO_103 and
    GPIO_106.
    
    BUG=chrome-os-partner:61370
    BRANCH=reef
    TEST=Enter s0ix state in OS, after resume run flashrom to read SPI
    content.
    
    Change-Id: I5c59601ec00e93c03dd72a99a739add0950c6a51
    Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
    Reviewed-on: https://review.coreboot.org/18137
    Tested-by: build bot (Jenkins)
    Reviewed-by: Vaibhav Shankar <vaibhav.shankar at intel.com>
    Reviewed-by: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/18137 for details.

-gerrit