[coreboot-gerrit] Patch merged into coreboot/master: riscv: get SBI calls to work
gerrit at coreboot.org
gerrit at coreboot.org
Mon Jan 16 00:26:10 CET 2017
the following patch was just integrated into master:
commit 6f3a53b6f61126f05db950e1c0a2c0b4f1552e5f
Author: Ronald G. Minnich <rminnich at gmail.com>
Date: Sun Jan 15 17:40:51 2017 +0100
riscv: get SBI calls to work
SBI calls, as it turned out, were never right.
They did not set the stack correctly on traps.
They were not correctly setting the MIP instead of the SIP
(although this was not really well documented).
On Harvey, we were trying to avoid using them,
and due to a bug in SPIKE, our avoidance worked.
Once SPIKE was fixed, our avoidance broke.
This set of changes is tested and working with Harvey
which, for the first time, is making SBI calls.
It's not pretty and we're going to want to rework
trap_util.S in coming days.
Change-Id: Ibef530adcc58d33e2c44ff758e0b7d2acbdc5e99
Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Reviewed-on: https://review.coreboot.org/18097
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/18097 for details.
-gerrit
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