[coreboot-gerrit] New patch to review for coreboot: amd/mct: Add default values to highest_rank_count for DDR2

[Timothy Pearson (tpearson@raptorengineering.com)]

Timothy Pearson (tpearson at raptorengineering.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18078

-gerrit

commit 2db6f1bbf0b46ec7922264092bfc9fb1945d2f60
Author: Timothy Pearson <tpearson at raptorengineering.com>
Date:   Mon Jan 9 17:47:37 2017 -0600

    amd/mct: Add default values to highest_rank_count for DDR2
    
    The values of highest_rank_count were undefined on DDR2 systems.
    Explcitly define these values to 0 on DDR2 platforms.
    
    Found-by: Coverity Scan #1347338
    Change-Id: Iad7bb00db97b2816fcc44fb5941bd14373451da2
    Signed-off-by: Timothy Pearson <tpearson at raptorengineering.com>
---
 src/northbridge/amd/amdmct/wrappers/mcti_d.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
index 06e4a06..46e89c9 100644
--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
@@ -379,6 +379,9 @@ void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat)
 				highest_rank_count[i] = pDCTstat->DimmRanks[dimm];
 		}
 	}
+#else
+	highest_rank_count[0] = 0x0;
+	highest_rank_count[1] = 0x0;
 #endif
 
 	/* Set limits if needed */